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Add MulDivIterativePlugin in readme

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Dolu1990 2018-03-10 12:57:42 +01:00
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@ -34,6 +34,7 @@
+ [DBusCachedPlugin](#dbuscachedplugin) + [DBusCachedPlugin](#dbuscachedplugin)
+ [MulPlugin](#mulplugin) + [MulPlugin](#mulplugin)
+ [DivPlugin](#divplugin) + [DivPlugin](#divplugin)
+ [MulDivIterativePlugin](#MulDivIterativePlugin)
+ [CsrPlugin](#csrplugin) + [CsrPlugin](#csrplugin)
+ [StaticMemoryTranslatorPlugin](#staticmemorytranslatorplugin) + [StaticMemoryTranslatorPlugin](#staticmemorytranslatorplugin)
+ [MemoryTranslatorPlugin](#memorytranslatorplugin) + [MemoryTranslatorPlugin](#memorytranslatorplugin)
@ -895,6 +896,26 @@ Implement the multiplication instruction from the RISC-V M extension. Its implem
Implement the division/modulo instruction from the RISC-V M extension. It is done by a simple iterative manner which always take 34 cycles. The result is inserted into the Memory stage. Implement the division/modulo instruction from the RISC-V M extension. It is done by a simple iterative manner which always take 34 cycles. The result is inserted into the Memory stage.
This plugin is now based on the MulDivIterativePlugin one.
#### MulDivIterativePlugin
This plugin implement the multiplication, division and modulo of the RISC-V M extension by an iterative manner, which is friendly for small FPGA which don't provide DSP blocks.
This plugin is able to unrool the iterative calculation process to reduce the number of cycles used to execute mul/div instructions.
| Parameters | type | description |
| ------ | ----------- | ------ |
| genMul | Boolean | Enable the multiplication support, can be set to false if you wan for instance to use the MulPlugin instead |
| genDiv | Boolean | Enable the division support |
| mulUnroolFactor | Int | Number of combinatorial stages used to speed up the multiplication, should be > 0 |
| divUnroolFactor | Int | Number of combinatorial stages used to speed up the division, should be > 0 |
The number of cycles used to execute a multiplication is '32/mulUnroolFactor'
The number of cycles used to execute a division is '32/divUnroolFactor + 1'
Both mul/div are processed into the memory stage (late result)
#### CsrPlugin #### CsrPlugin
Implement most of the Machine mode and a very little bit of the User mode specified in the RISC-V previlegied spec. The access mode of most of the CSR is parameterizable (NONE/READ_ONLY/WRITE_ONLY/READ_WRITE) to reduce the area usage of useless features. Implement most of the Machine mode and a very little bit of the User mode specified in the RISC-V previlegied spec. The access mode of most of the CSR is parameterizable (NONE/READ_ONLY/WRITE_ONLY/READ_WRITE) to reduce the area usage of useless features.