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MMU sum/mxr tested and ok, all seem finen

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Dolu1990 2019-03-22 17:11:55 +01:00
parent f7b793b7bf
commit 597336b491
4 changed files with 564 additions and 439 deletions
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608
src/test/cpp/raw/mmu/build/mmu.asm
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@ -7,7 +7,7 @@ Disassembly of section .crt_section:
80000000 <_start>:
80000000: 00000e93 li t4,0
80000004: 00000097 auipc ra,0x0
80000008: 3f008093 addi ra,ra,1008 # 800003f4 <trap>
80000008: 59008093 addi ra,ra,1424 # 80000594 <trap>
8000000c: 30509073 csrw mtvec,ra
80000010 <test1>:
@ -17,7 +17,7 @@ Disassembly of section .crt_section:
8000001c: 27262137 lui sp,0x27262
80000020: 52410113 addi sp,sp,1316 # 27262524 <_start-0x58d9dadc>
80000024: 0040a083 lw ra,4(ra)
80000028: 3a209263 bne ra,sp,800003cc <fail>
80000028: 54209263 bne ra,sp,8000056c <fail>
8000002c <test2>:
8000002c: 00200e13 li t3,2
@ -28,7 +28,7 @@ Disassembly of section .crt_section:
80000040: 80008093 addi ra,ra,-2048 # 1800 <_start-0x7fffe800>
80000044: 30009073 csrw mstatus,ra
80000048: 30200073 mret
8000004c: 3800006f j 800003cc <fail>
8000004c: 5200006f j 8000056c <fail>
80000050 <test3>:
80000050: 00300e13 li t3,3
@ -39,7 +39,7 @@ Disassembly of section .crt_section:
80000064: 01408093 addi ra,ra,20 # 80000074 <test4>
80000068: 34109073 csrw mepc,ra
8000006c: 30200073 mret
80000070: 35c0006f j 800003cc <fail>
80000070: 4fc0006f j 8000056c <fail>
80000074 <test4>:
80000074: 00400e13 li t3,4
@ -48,7 +48,7 @@ Disassembly of section .crt_section:
80000080: 37363137 lui sp,0x37363
80000084: 53410113 addi sp,sp,1332 # 37363534 <_start-0x48c9cacc>
80000088: 0040a083 lw ra,4(ra)
8000008c: 34209063 bne ra,sp,800003cc <fail>
8000008c: 4e209063 bne ra,sp,8000056c <fail>
80000090 <test5>:
80000090: 00500e13 li t3,5
@ -63,7 +63,7 @@ Disassembly of section .crt_section:
800000b4: f5008093 addi ra,ra,-176 # 80002000 <MMU_TABLE_1>
800000b8: 80000137 lui sp,0x80000
800000bc: 00215113 srli sp,sp,0x2
800000c0: 01f16113 ori sp,sp,31
800000c0: 00f16113 ori sp,sp,15
800000c4: 0020a023 sw sp,0(ra)
800000c8: 00500e13 li t3,5
800000cc: 00002097 auipc ra,0x2
@ -108,321 +108,337 @@ Disassembly of section .crt_section:
80000168: 00215113 srli sp,sp,0x2
8000016c: 01b16113 ori sp,sp,27
80000170: 0020a023 sw sp,0(ra)
80000174: 00500e13 li t3,5
80000178: 00002097 auipc ra,0x2
8000017c: 88808093 addi ra,ra,-1912 # 80001a00 <MMU_TABLE_0+0xa00>
80000180: 00000117 auipc sp,0x0
80000184: e8010113 addi sp,sp,-384 # 80000000 <_start>
80000188: 00215113 srli sp,sp,0x2
8000018c: 01f16113 ori sp,sp,31
80000190: 0020a023 sw sp,0(ra)
80000194: 00500e13 li t3,5
80000198: 00002097 auipc ra,0x2
8000019c: 96808093 addi ra,ra,-1688 # 80001b00 <MMU_TABLE_0+0xb00>
800001a0: 0000a023 sw zero,0(ra)
800001a4: 000400b7 lui ra,0x40
800001a8: 1000a073 csrs sstatus,ra
800001ac: 00001097 auipc ra,0x1
800001b0: e5408093 addi ra,ra,-428 # 80001000 <MMU_TABLE_0>
800001b4: 00c0d093 srli ra,ra,0xc
800001b8: 80000137 lui sp,0x80000
800001bc: 0020e0b3 or ra,ra,sp
800001c0: 18009073 csrw satp,ra
80000174: 00003097 auipc ra,0x3
80000178: edc08093 addi ra,ra,-292 # 80003050 <MMU_TABLE_2+0x50>
8000017c: 0000a117 auipc sp,0xa
80000180: e8410113 addi sp,sp,-380 # 8000a000 <ROM_5>
80000184: 00215113 srli sp,sp,0x2
80000188: 00f16113 ori sp,sp,15
8000018c: 0020a023 sw sp,0(ra)
80000190: 00500e13 li t3,5
80000194: 00002097 auipc ra,0x2
80000198: 86c08093 addi ra,ra,-1940 # 80001a00 <MMU_TABLE_0+0xa00>
8000019c: 00000117 auipc sp,0x0
800001a0: e6410113 addi sp,sp,-412 # 80000000 <_start>
800001a4: 00215113 srli sp,sp,0x2
800001a8: 01f16113 ori sp,sp,31
800001ac: 0020a023 sw sp,0(ra)
800001b0: 00500e13 li t3,5
800001b4: 00002097 auipc ra,0x2
800001b8: 94c08093 addi ra,ra,-1716 # 80001b00 <MMU_TABLE_0+0xb00>
800001bc: 0000a023 sw zero,0(ra)
800001c0: 000400b7 lui ra,0x40
800001c4: 1000a073 csrs sstatus,ra
800001c8: 00001097 auipc ra,0x1
800001cc: e3808093 addi ra,ra,-456 # 80001000 <MMU_TABLE_0>
800001d0: 00c0d093 srli ra,ra,0xc
800001d4: 80000137 lui sp,0x80000
800001d8: 0020e0b3 or ra,ra,sp
800001dc: 18009073 csrw satp,ra
800001c4 <test6>:
800001c4: 00600e13 li t3,6
800001c8: 9000a0b7 lui ra,0x9000a
800001cc: 00808093 addi ra,ra,8 # 9000a008 <ROM_7+0xfffe008>
800001d0: 4b4a5137 lui sp,0x4b4a5
800001d4: 94810113 addi sp,sp,-1720 # 4b4a4948 <_start-0x34b5b6b8>
800001d8: 0000a083 lw ra,0(ra)
800001dc: 1e209863 bne ra,sp,800003cc <fail>
800001e0 <test7>:
800001e0: 00700e13 li t3,7
800001e0 <test6>:
800001e0: 00600e13 li t3,6
800001e4: 9000a0b7 lui ra,0x9000a
800001e8: 36008093 addi ra,ra,864 # 9000a360 <ROM_7+0xfffe360>
800001ec: aaee0137 lui sp,0xaaee0
800001f0: 00110113 addi sp,sp,1 # aaee0001 <ROM_7+0x2aed4001>
800001f4: 0020a023 sw sp,0(ra)
800001f8: 0000a083 lw ra,0(ra)
800001fc: 1c209863 bne ra,sp,800003cc <fail>
800001e8: 00808093 addi ra,ra,8 # 9000a008 <ROM_7+0xfffe008>
800001ec: 4b4a5137 lui sp,0x4b4a5
800001f0: 94810113 addi sp,sp,-1720 # 4b4a4948 <_start-0x34b5b6b8>
800001f4: 0000a083 lw ra,0(ra)
800001f8: 36209a63 bne ra,sp,8000056c <fail>
80000200 <test8>:
80000200: 00800e13 li t3,8
80000204: 2000c097 auipc ra,0x2000c
80000208: e0008093 addi ra,ra,-512 # a000c004 <ROM_7+0x20000004>
8000020c: 77767137 lui sp,0x77767
80000210: 57410113 addi sp,sp,1396 # 77767574 <_start-0x8898a8c>
800001fc <test7>:
800001fc: 00700e13 li t3,7
80000200: 9000a0b7 lui ra,0x9000a
80000204: 36008093 addi ra,ra,864 # 9000a360 <ROM_7+0xfffe360>
80000208: aaee0137 lui sp,0xaaee0
8000020c: 00110113 addi sp,sp,1 # aaee0001 <ROM_7+0x2aed4001>
80000210: 0020a023 sw sp,0(ra)
80000214: 0000a083 lw ra,0(ra)
80000218: 1a209a63 bne ra,sp,800003cc <fail>
80000218: 34209a63 bne ra,sp,8000056c <fail>
8000021c <test9>:
8000021c: 00900e13 li t3,9
80000220: a000a0b7 lui ra,0xa000a
80000224: 36008093 addi ra,ra,864 # a000a360 <ROM_7+0x1fffe360>
80000228: aaee0137 lui sp,0xaaee0
8000022c: 00210113 addi sp,sp,2 # aaee0002 <ROM_7+0x2aed4002>
80000230: 0020a023 sw sp,0(ra)
80000234: 0000a083 lw ra,0(ra)
80000238: 18209a63 bne ra,sp,800003cc <fail>
8000021c <test8>:
8000021c: 00800e13 li t3,8
80000220: 2000c097 auipc ra,0x2000c
80000224: de408093 addi ra,ra,-540 # a000c004 <ROM_7+0x20000004>
80000228: 77767137 lui sp,0x77767
8000022c: 57410113 addi sp,sp,1396 # 77767574 <_start-0x8898a8c>
80000230: 0000a083 lw ra,0(ra)
80000234: 32209c63 bne ra,sp,8000056c <fail>
8000023c <test10>:
8000023c: 00a00e13 li t3,10
80000240: 18005073 csrwi satp,0
80000244: 00009097 auipc ra,0x9
80000248: 11c08093 addi ra,ra,284 # 80009360 <ROM_4+0x360>
8000024c: aaee0137 lui sp,0xaaee0
80000250: 00110113 addi sp,sp,1 # aaee0001 <ROM_7+0x2aed4001>
80000254: 0000a083 lw ra,0(ra)
80000258: 16209a63 bne ra,sp,800003cc <fail>
80000238 <test9>:
80000238: 00900e13 li t3,9
8000023c: a000a0b7 lui ra,0xa000a
80000240: 36008093 addi ra,ra,864 # a000a360 <ROM_7+0x1fffe360>
80000244: aaee0137 lui sp,0xaaee0
80000248: 00210113 addi sp,sp,2 # aaee0002 <ROM_7+0x2aed4002>
8000024c: 0020a023 sw sp,0(ra)
80000250: 0000a083 lw ra,0(ra)
80000254: 30209c63 bne ra,sp,8000056c <fail>
8000025c <test11>:
8000025c: 00b00e13 li t3,11
80000260: 0000a097 auipc ra,0xa
80000264: 10008093 addi ra,ra,256 # 8000a360 <ROM_5+0x360>
80000258 <test10>:
80000258: 00a00e13 li t3,10
8000025c: 18005073 csrwi satp,0
80000260: 00009097 auipc ra,0x9
80000264: 10008093 addi ra,ra,256 # 80009360 <ROM_4+0x360>
80000268: aaee0137 lui sp,0xaaee0
8000026c: 00210113 addi sp,sp,2 # aaee0002 <ROM_7+0x2aed4002>
8000026c: 00110113 addi sp,sp,1 # aaee0001 <ROM_7+0x2aed4001>
80000270: 0000a083 lw ra,0(ra)
80000274: 14209c63 bne ra,sp,800003cc <fail>
80000278: 00001097 auipc ra,0x1
8000027c: d8808093 addi ra,ra,-632 # 80001000 <MMU_TABLE_0>
80000280: 00c0d093 srli ra,ra,0xc
80000284: 80000137 lui sp,0x80000
80000288: 0020e0b3 or ra,ra,sp
8000028c: 18009073 csrw satp,ra
80000274: 2e209c63 bne ra,sp,8000056c <fail>
80000290 <test12>:
80000290: 00c00e13 li t3,12
80000294: 00100e93 li t4,1
80000298: 00000f17 auipc t5,0x0
8000029c: 010f0f13 addi t5,t5,16 # 800002a8 <test13>
800002a0: 00000073 ecall
800002a4: 1280006f j 800003cc <fail>
80000278 <test11>:
80000278: 00b00e13 li t3,11
8000027c: 0000a097 auipc ra,0xa
80000280: 0e408093 addi ra,ra,228 # 8000a360 <ROM_5+0x360>
80000284: aaee0137 lui sp,0xaaee0
80000288: 00210113 addi sp,sp,2 # aaee0002 <ROM_7+0x2aed4002>
8000028c: 0000a083 lw ra,0(ra)
80000290: 2c209e63 bne ra,sp,8000056c <fail>
80000294: 00001097 auipc ra,0x1
80000298: d6c08093 addi ra,ra,-660 # 80001000 <MMU_TABLE_0>
8000029c: 00c0d093 srli ra,ra,0xc
800002a0: 80000137 lui sp,0x80000
800002a4: 0020e0b3 or ra,ra,sp
800002a8: 18009073 csrw satp,ra
800002a8 <test13>:
800002a8: 00d00e13 li t3,13
800002ac: 00000f17 auipc t5,0x0
800002b0: 014f0f13 addi t5,t5,20 # 800002c0 <test14>
800002b4: b00000b7 lui ra,0xb0000
800002b8: 0080a083 lw ra,8(ra) # b0000008 <ROM_7+0x2fff4008>
800002bc: 1100006f j 800003cc <fail>
800002ac <test12>:
800002ac: 00c00e13 li t3,12
800002b0: 00100e93 li t4,1
800002b4: 00000f17 auipc t5,0x0
800002b8: 010f0f13 addi t5,t5,16 # 800002c4 <test13>
800002bc: 00000073 ecall
800002c0: 2ac0006f j 8000056c <fail>
800002c0 <test14>:
800002c0: 00e00e13 li t3,14
800002c4: 00000f17 auipc t5,0x0
800002c8: 014f0f13 addi t5,t5,20 # 800002d8 <test15>
800002cc: b00000b7 lui ra,0xb0000
800002d0: 0010a423 sw ra,8(ra) # b0000008 <ROM_7+0x2fff4008>
800002d4: 0f80006f j 800003cc <fail>
800002c4 <test13>:
800002c4: 00d00e13 li t3,13
800002c8: 00000f17 auipc t5,0x0
800002cc: 014f0f13 addi t5,t5,20 # 800002dc <test14>
800002d0: b00000b7 lui ra,0xb0000
800002d4: 0080a083 lw ra,8(ra) # b0000008 <ROM_7+0x2fff4008>
800002d8: 2940006f j 8000056c <fail>
800002d8 <test15>:
800002d8: 00f00e13 li t3,15
800002dc: 00000f17 auipc t5,0x0
800002e0: 014f0f13 addi t5,t5,20 # 800002f0 <test15_end>
800002e4: b00000b7 lui ra,0xb0000
800002e8: 00008067 ret
800002ec: 0e00006f j 800003cc <fail>
800002dc <test14>:
800002dc: 00e00e13 li t3,14
800002e0: 00000f17 auipc t5,0x0
800002e4: 014f0f13 addi t5,t5,20 # 800002f4 <test15>
800002e8: b00000b7 lui ra,0xb0000
800002ec: 0010a423 sw ra,8(ra) # b0000008 <ROM_7+0x2fff4008>
800002f0: 27c0006f j 8000056c <fail>
800002f0 <test15_end>:
800002f0: 01000e13 li t3,16
800002f4: 00000e93 li t4,0
800002f8: 900100b7 lui ra,0x90010
800002fc: 00808093 addi ra,ra,8 # 90010008 <ROM_7+0x10004008>
80000300: 5b5a6137 lui sp,0x5b5a6
80000304: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000308: 0000a083 lw ra,0(ra)
8000030c: 0c209063 bne ra,sp,800003cc <fail>
80000310: 900110b7 lui ra,0x90011
80000314: 00808093 addi ra,ra,8 # 90011008 <ROM_7+0x10005008>
80000318: 5b5a6137 lui sp,0x5b5a6
8000031c: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000320: 0000a083 lw ra,0(ra)
80000324: 0a209463 bne ra,sp,800003cc <fail>
80000328: 900130b7 lui ra,0x90013
8000032c: 00808093 addi ra,ra,8 # 90013008 <ROM_7+0x10007008>
80000330: 5b5a6137 lui sp,0x5b5a6
80000334: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000338: 0000a083 lw ra,0(ra)
8000033c: 08209863 bne ra,sp,800003cc <fail>
800002f4 <test15>:
800002f4: 00f00e13 li t3,15
800002f8: 00000f17 auipc t5,0x0
800002fc: 014f0f13 addi t5,t5,20 # 8000030c <test15_end>
80000300: b00000b7 lui ra,0xb0000
80000304: 00008067 ret
80000308: 2640006f j 8000056c <fail>
80000340 <test17>:
80000340: 01100e13 li t3,17
80000344: 900110b7 lui ra,0x90011
80000348: 36008093 addi ra,ra,864 # 90011360 <ROM_7+0x10005360>
8000034c: aaee0137 lui sp,0xaaee0
80000350: 00310113 addi sp,sp,3 # aaee0003 <ROM_7+0x2aed4003>
80000354: 0020a023 sw sp,0(ra)
80000358: 0000a083 lw ra,0(ra)
8000035c: 06209863 bne ra,sp,800003cc <fail>
8000030c <test15_end>:
8000030c: 01000e13 li t3,16
80000310: 00000e93 li t4,0
80000314: 900100b7 lui ra,0x90010
80000318: 00808093 addi ra,ra,8 # 90010008 <ROM_7+0x10004008>
8000031c: 5b5a6137 lui sp,0x5b5a6
80000320: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000324: 0000a083 lw ra,0(ra)
80000328: 24209263 bne ra,sp,8000056c <fail>
8000032c: 900110b7 lui ra,0x90011
80000330: 00808093 addi ra,ra,8 # 90011008 <ROM_7+0x10005008>
80000334: 5b5a6137 lui sp,0x5b5a6
80000338: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
8000033c: 0000a083 lw ra,0(ra)
80000340: 22209663 bne ra,sp,8000056c <fail>
80000344: 900130b7 lui ra,0x90013
80000348: 00808093 addi ra,ra,8 # 90013008 <ROM_7+0x10007008>
8000034c: 5b5a6137 lui sp,0x5b5a6
80000350: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000354: 0000a083 lw ra,0(ra)
80000358: 20209a63 bne ra,sp,8000056c <fail>
80000360 <test18>:
80000360: 01200e13 li t3,18
80000364: 00000097 auipc ra,0x0
80000368: 01808093 addi ra,ra,24 # 8000037c <test18_end>
8000036c: 90012137 lui sp,0x90012
80000370: 01010113 addi sp,sp,16 # 90012010 <ROM_7+0x10006010>
80000374: 00010067 jr sp
80000378: 0540006f j 800003cc <fail>
8000035c <test17>:
8000035c: 01100e13 li t3,17
80000360: 900110b7 lui ra,0x90011
80000364: 36008093 addi ra,ra,864 # 90011360 <ROM_7+0x10005360>
80000368: aaee0137 lui sp,0xaaee0
8000036c: 00310113 addi sp,sp,3 # aaee0003 <ROM_7+0x2aed4003>
80000370: 0020a023 sw sp,0(ra)
80000374: 0000a083 lw ra,0(ra)
80000378: 1e209a63 bne ra,sp,8000056c <fail>
8000037c <test18_end>:
8000037c: 00100e93 li t4,1
80000380: 00000f17 auipc t5,0x0
80000384: 018f0f13 addi t5,t5,24 # 80000398 <test19_readTrap>
80000388: 900120b7 lui ra,0x90012
8000038c: 01008093 addi ra,ra,16 # 90012010 <ROM_7+0x10006010>
80000390: 0000a083 lw ra,0(ra)
80000394: 0380006f j 800003cc <fail>
8000037c <test18>:
8000037c: 01200e13 li t3,18
80000380: 00000097 auipc ra,0x0
80000384: 01808093 addi ra,ra,24 # 80000398 <test18_end>
80000388: 90012137 lui sp,0x90012
8000038c: 01010113 addi sp,sp,16 # 90012010 <ROM_7+0x10006010>
80000390: 00010067 jr sp
80000394: 1d80006f j 8000056c <fail>
80000398 <test19_readTrap>:
80000398: 00000f17 auipc t5,0x0
8000039c: 018f0f13 addi t5,t5,24 # 800003b0 <test19_writeTrap>
800003a0: 900130b7 lui ra,0x90013
800003a4: 01008093 addi ra,ra,16 # 90013010 <ROM_7+0x10007010>
800003a8: 0010a023 sw ra,0(ra)
800003ac: 0200006f j 800003cc <fail>
80000398 <test18_end>:
80000398: 01300e13 li t3,19
8000039c: 00100e93 li t4,1
800003a0: 00000f17 auipc t5,0x0
800003a4: 018f0f13 addi t5,t5,24 # 800003b8 <test19_readTrap>
800003a8: 900120b7 lui ra,0x90012
800003ac: 01008093 addi ra,ra,16 # 90012010 <ROM_7+0x10006010>
800003b0: 0000a083 lw ra,0(ra)
800003b4: 1b80006f j 8000056c <fail>
800003b0 <test19_writeTrap>:
800003b0: 00000f17 auipc t5,0x0
800003b4: 018f0f13 addi t5,t5,24 # 800003c8 <test19_executeTrap>
800003b8: 900110b7 lui ra,0x90011
800003bc: 01008093 addi ra,ra,16 # 90011010 <ROM_7+0x10005010>
800003c0: 00008067 ret
800003c4: 0080006f j 800003cc <fail>
800003b8 <test19_readTrap>:
800003b8: 00000f17 auipc t5,0x0
800003bc: 018f0f13 addi t5,t5,24 # 800003d0 <test19_writeTrap>
800003c0: 900130b7 lui ra,0x90013
800003c4: 01008093 addi ra,ra,16 # 90013010 <ROM_7+0x10007010>
800003c8: 0010a023 sw ra,0(ra)
800003cc: 1a00006f j 8000056c <fail>
800003c8 <test19_executeTrap>:
800003c8: 0180006f j 800003e0 <pass>
800003d0 <test19_writeTrap>:
800003d0: 00000f17 auipc t5,0x0
800003d4: 018f0f13 addi t5,t5,24 # 800003e8 <test19_executeTrap>
800003d8: 900110b7 lui ra,0x90011
800003dc: 01008093 addi ra,ra,16 # 90011010 <ROM_7+0x10005010>
800003e0: 00008067 ret
800003e4: 1880006f j 8000056c <fail>
800003cc <fail>:
800003cc: 18005073 csrwi satp,0
800003d0: 0040006f j 800003d4 <failFence>
800003e8 <test19_executeTrap>:
800003e8: 01500e13 li t3,21
800003ec: 00000e93 li t4,0
800003f0: 000800b7 lui ra,0x80
800003f4: 1000a073 csrs sstatus,ra
800003f8: 900120b7 lui ra,0x90012
800003fc: 00808093 addi ra,ra,8 # 90012008 <ROM_7+0x10006008>
80000400: 5b5a6137 lui sp,0x5b5a6
80000404: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
80000408: 0000a083 lw ra,0(ra)
8000040c: 16209063 bne ra,sp,8000056c <fail>
80000410: 000800b7 lui ra,0x80
80000414: 1000b073 csrc sstatus,ra
800003d4 <failFence>:
800003d4: f0100137 lui sp,0xf0100
800003d8: f2410113 addi sp,sp,-220 # f00fff24 <ROM_7+0x700f3f24>
800003dc: 01c12023 sw t3,0(sp)
80000418 <test21>:
80000418: 00000e93 li t4,0
8000041c: 01400e13 li t3,20
80000420: 900140b7 lui ra,0x90014
80000424: 38008093 addi ra,ra,896 # 90014380 <ROM_7+0x10008380>
80000428: aaee0137 lui sp,0xaaee0
8000042c: 00510113 addi sp,sp,5 # aaee0005 <ROM_7+0x2aed4005>
80000430: 0020a023 sw sp,0(ra)
80000434: 0000a083 lw ra,0(ra)
80000438: 12209a63 bne ra,sp,8000056c <fail>
8000043c: 000400b7 lui ra,0x40
80000440: 1000b073 csrc sstatus,ra
80000444: 00100e93 li t4,1
80000448: 00000f17 auipc t5,0x0
8000044c: 018f0f13 addi t5,t5,24 # 80000460 <test21_pass>
80000450: 900110b7 lui ra,0x90011
80000454: 64808093 addi ra,ra,1608 # 90011648 <ROM_7+0x10005648>
80000458: 0010a023 sw ra,0(ra)
8000045c: 1100006f j 8000056c <fail>
800003e0 <pass>:
800003e0: 18005073 csrwi satp,0
800003e4: 0040006f j 800003e8 <passFence>
80000460 <test21_pass>:
80000460: 03200e13 li t3,50
80000464: 00000e93 li t4,0
80000468: 000400b7 lui ra,0x40
8000046c: 1000a073 csrs sstatus,ra
80000470: 18002573 csrr a0,satp
80000474: 18001073 csrw satp,zero
80000478: 00002097 auipc ra,0x2
8000047c: b8808093 addi ra,ra,-1144 # 80002000 <MMU_TABLE_1>
80000480: 80000137 lui sp,0x80000
80000484: 00215113 srli sp,sp,0x2
80000488: 01f16113 ori sp,sp,31
8000048c: 0020a023 sw sp,0(ra)
80000490: 18051073 csrw satp,a0
80000494: 10000093 li ra,256
80000498: 1000b073 csrc sstatus,ra
8000049c: 00000097 auipc ra,0x0
800004a0: 01808093 addi ra,ra,24 # 800004b4 <test51>
800004a4: 14109073 csrw sepc,ra
800004a8: 12000073 sfence.vma
800004ac: 10200073 sret
800004b0: 0bc0006f j 8000056c <fail>
800003e8 <passFence>:
800003e8: f0100137 lui sp,0xf0100
800003ec: f2010113 addi sp,sp,-224 # f00fff20 <ROM_7+0x700f3f20>
800003f0: 00012023 sw zero,0(sp)
800004b4 <test51>:
800004b4: 03300e13 li t3,51
800004b8: 900110b7 lui ra,0x90011
800004bc: 00808093 addi ra,ra,8 # 90011008 <ROM_7+0x10005008>
800004c0: 5b5a6137 lui sp,0x5b5a6
800004c4: 95810113 addi sp,sp,-1704 # 5b5a5958 <_start-0x24a5a6a8>
800004c8: 0000a083 lw ra,0(ra)
800004cc: 0a209063 bne ra,sp,8000056c <fail>
800004d0: a000a0b7 lui ra,0xa000a
800004d4: 32408093 addi ra,ra,804 # a000a324 <ROM_7+0x1fffe324>
800004d8: aaee0137 lui sp,0xaaee0
800004dc: 00810113 addi sp,sp,8 # aaee0008 <ROM_7+0x2aed4008>
800004e0: 0020a023 sw sp,0(ra)
800004e4: 0000a083 lw ra,0(ra)
800004e8: 08209263 bne ra,sp,8000056c <fail>
800003f4 <trap>:
800003f4: fc0e8ce3 beqz t4,800003cc <fail>
800003f8: 342020f3 csrr ra,mcause
800003fc: 341020f3 csrr ra,mepc
80000400: 341f1073 csrw mepc,t5
80000404: 30200073 mret
80000408: 00000013 nop
8000040c: 00000013 nop
80000410: 00000013 nop
80000414: 00000013 nop
80000418: 00000013 nop
8000041c: 00000013 nop
80000420: 00000013 nop
80000424: 00000013 nop
80000428: 00000013 nop
8000042c: 00000013 nop
80000430: 00000013 nop
80000434: 00000013 nop
80000438: 00000013 nop
8000043c: 00000013 nop
80000440: 00000013 nop
80000444: 00000013 nop
80000448: 00000013 nop
8000044c: 00000013 nop
80000450: 00000013 nop
80000454: 00000013 nop
80000458: 00000013 nop
8000045c: 00000013 nop
80000460: 00000013 nop
80000464: 00000013 nop
80000468: 00000013 nop
8000046c: 00000013 nop
80000470: 00000013 nop
80000474: 00000013 nop
80000478: 00000013 nop
8000047c: 00000013 nop
80000480: 00000013 nop
80000484: 00000013 nop
80000488: 00000013 nop
8000048c: 00000013 nop
80000490: 00000013 nop
80000494: 00000013 nop
80000498: 00000013 nop
8000049c: 00000013 nop
800004a0: 00000013 nop
800004a4: 00000013 nop
800004a8: 00000013 nop
800004ac: 00000013 nop
800004b0: 00000013 nop
800004b4: 00000013 nop
800004b8: 00000013 nop
800004bc: 00000013 nop
800004c0: 00000013 nop
800004c4: 00000013 nop
800004c8: 00000013 nop
800004cc: 00000013 nop
800004d0: 00000013 nop
800004d4: 00000013 nop
800004d8: 00000013 nop
800004dc: 00000013 nop
800004e0: 00000013 nop
800004e4: 00000013 nop
800004e8: 00000013 nop
800004ec: 00000013 nop
800004f0: 00000013 nop
800004f4: 00000013 nop
800004f8: 00000013 nop
800004fc: 00000013 nop
80000500: 00000013 nop
80000504: 00000013 nop
80000508: 00000013 nop
8000050c: 00000013 nop
80000510: 00000013 nop
80000514: 00000013 nop
80000518: 00000013 nop
8000051c: 00000013 nop
80000520: 00000013 nop
80000524: 00000013 nop
80000528: 00000013 nop
8000052c: 00000013 nop
80000530: 00000013 nop
80000534: 00000013 nop
80000538: 00000013 nop
8000053c: 00000013 nop
80000540: 00000013 nop
80000544: 00000013 nop
80000548: 00000013 nop
8000054c: 00000013 nop
80000550: 00000013 nop
80000554: 00000013 nop
80000558: 00000013 nop
8000055c: 00000013 nop
80000560: 00000013 nop
80000564: 00000013 nop
80000568: 00000013 nop
8000056c: 00000013 nop
80000570: 00000013 nop
80000574: 00000013 nop
80000578: 00000013 nop
8000057c: 00000013 nop
80000580: 00000013 nop
80000584: 00000013 nop
80000588: 00000013 nop
8000058c: 00000013 nop
80000590: 00000013 nop
80000594: 00000013 nop
80000598: 00000013 nop
8000059c: 00000013 nop
800005a0: 00000013 nop
800005a4: 00000013 nop
800005a8: 00000013 nop
800005ac: 00000013 nop
800004ec <test52>:
800004ec: 03400e13 li t3,52
800004f0: 00000097 auipc ra,0x0
800004f4: 01808093 addi ra,ra,24 # 80000508 <test53>
800004f8: 90012137 lui sp,0x90012
800004fc: 01010113 addi sp,sp,16 # 90012010 <ROM_7+0x10006010>
80000500: 00010067 jr sp
80000504: 0680006f j 8000056c <fail>
80000508 <test53>:
80000508: 03500e13 li t3,53
8000050c: 00100e93 li t4,1
80000510: 00000f17 auipc t5,0x0
80000514: 018f0f13 addi t5,t5,24 # 80000528 <test54>
80000518: 900140b7 lui ra,0x90014
8000051c: 39008093 addi ra,ra,912 # 90014390 <ROM_7+0x10008390>
80000520: 00008067 ret
80000524: 0480006f j 8000056c <fail>
80000528 <test54>:
80000528: 03600e13 li t3,54
8000052c: 00100e93 li t4,1
80000530: 00000f17 auipc t5,0x0
80000534: 018f0f13 addi t5,t5,24 # 80000548 <test55>
80000538: 900140b7 lui ra,0x90014
8000053c: 39408093 addi ra,ra,916 # 90014394 <ROM_7+0x10008394>
80000540: 0000a083 lw ra,0(ra)
80000544: 0280006f j 8000056c <fail>
80000548 <test55>:
80000548: 03700e13 li t3,55
8000054c: 00100e93 li t4,1
80000550: 00000f17 auipc t5,0x0
80000554: 018f0f13 addi t5,t5,24 # 80000568 <test56>
80000558: 900140b7 lui ra,0x90014
8000055c: 39808093 addi ra,ra,920 # 90014398 <ROM_7+0x10008398>
80000560: 0010a023 sw ra,0(ra)
80000564: 0080006f j 8000056c <fail>
80000568 <test56>:
80000568: 0180006f j 80000580 <pass>
8000056c <fail>:
8000056c: 00000e93 li t4,0
80000570: 00000073 ecall
80000574 <failFence>:
80000574: f0100137 lui sp,0xf0100
80000578: f2410113 addi sp,sp,-220 # f00fff24 <ROM_7+0x700f3f24>
8000057c: 01c12023 sw t3,0(sp)
80000580 <pass>:
80000580: 00200e93 li t4,2
80000584: 00000073 ecall
80000588 <passFence>:
80000588: f0100137 lui sp,0xf0100
8000058c: f2010113 addi sp,sp,-224 # f00fff20 <ROM_7+0x700f3f20>
80000590: 00012023 sw zero,0(sp)
80000594 <trap>:
80000594: fe0e80e3 beqz t4,80000574 <failFence>
80000598: 342020f3 csrr ra,mcause
8000059c: 341020f3 csrr ra,mepc
800005a0: 00200093 li ra,2
800005a4: fe1e82e3 beq t4,ra,80000588 <passFence>
800005a8: 341f1073 csrw mepc,t5
800005ac: 30200073 mret
800005b0: 00000013 nop
800005b4: 00000013 nop
800005b8: 00000013 nop

176
src/test/cpp/raw/mmu/build/mmu.hex
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@ -1,17 +1,17 @@
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213
src/test/cpp/raw/mmu/src/crt.S
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@ -1,21 +1,26 @@
.globl _start
#define TEST_ID x28
#define TRAP_OK x29
#define TRAP_RET x30
ROM_SUPER_0:
_start:
li x29, 0 //Do not allow trap
li TRAP_OK, 0 //Do not allow trap
la x1, trap
csrw mtvec, x1
test1: //test ram
li x28, 1
li TEST_ID, 1
la x1, ROM_2
li x2, 0x27262524
lw x1, 4(x1)
bne x1, x2, fail
test2: //dummy mret
li x28, 2
li TEST_ID, 2
la x1, test3
csrw mepc, x1
li x1, 0x1800
@ -25,7 +30,7 @@ test2: //dummy mret
test3: // jump to supervisor
li x28, 3
li TEST_ID, 3
li x1, 0x0800
csrw mstatus, x1
la x1, test4
@ -36,7 +41,7 @@ test3: // jump to supervisor
test4: //test ram mmu off
li x28, 4
li TEST_ID, 4
la x1, ROM_3
li x2, 0x37363534
lw x1, 4(x1)
@ -44,7 +49,7 @@ test4: //test ram mmu off
test5: //setup MMU
li x28, 5
li TEST_ID, 5
la x1, MMU_TABLE_0 + 0x800
la x2, MMU_TABLE_1
srli x2, x2, 2
@ -54,11 +59,11 @@ test5: //setup MMU
la x1, MMU_TABLE_1 + 0x000*4
li x2, 0x80000000
srli x2, x2, 2
ori x2, x2, 0x1F
ori x2, x2, 0x0F
sw x2, 0(x1)
li x28, 5
li TEST_ID, 5
la x1, MMU_TABLE_0 + 0x900
la x2, MMU_TABLE_2
srli x2, x2, 2
@ -95,14 +100,20 @@ test5: //setup MMU
ori x2, x2, 0x11 + (0x5 << 1)
sw x2, 0(x1)
li x28, 5
la x1, MMU_TABLE_2 + 0x014*4 //no user
la x2, ROM_5
srli x2, x2, 2
ori x2, x2, 0x01 + (0x7 << 1)
sw x2, 0(x1)
li TEST_ID, 5
la x1, MMU_TABLE_0 + 0xA00
la x2, ROM_SUPER_0
srli x2, x2, 2
ori x2, x2, 0x1F
sw x2, 0(x1)
li x28, 5
li TEST_ID, 5
la x1, MMU_TABLE_0 + 0xB00
sw x0, 0(x1)
@ -117,7 +128,7 @@ test5: //setup MMU
test6: //read through MMU
li x28, 6
li TEST_ID, 6
li x1, 0x9000A008
li x2, 0x4B4A4948
lw x1, 0(x1)
@ -126,7 +137,7 @@ test6: //read through MMU
test7: //write-read through MMU
li x28, 7
li TEST_ID, 7
li x1, 0x9000A360
li x2, 0xAAEE0001
sw x2, 0(x1)
@ -135,7 +146,7 @@ test7: //write-read through MMU
test8: //read through MMU super page
li x28, 8
li TEST_ID, 8
la x1, ROM_7 + 0x20000004
li x2, 0x77767574
lw x1, 0(x1)
@ -144,7 +155,7 @@ test8: //read through MMU super page
test9: //write-read through MMU super page
li x28, 9
li TEST_ID, 9
li x1, 0xA000A360
li x2, 0xAAEE0002
sw x2, 0(x1)
@ -154,7 +165,7 @@ test9: //write-read through MMU super page
test10: //check previously written value without the MMU
li x28, 10
li TEST_ID, 10
csrwi satp, 0
la x1, ROM_4 + 0x360
@ -164,7 +175,7 @@ test10: //check previously written value without the MMU
test11:
li x28, 11
li TEST_ID, 11
la x1, ROM_SUPER_0 + 0xA360
li x2, 0xAAEE0002
lw x1, 0(x1)
@ -179,32 +190,32 @@ test11:
test12: //Dummy trap
li x28, 12
li x29, 1 //Allow trap
la x30, test13 // trap return address
li TEST_ID, 12
li TRAP_OK, 1 //Allow trap
la TRAP_RET, test13 // trap return address
ecall
j fail
test13: //Trap load page fault
li x28, 13
la x30, test14
li TEST_ID, 13
la TRAP_RET, test14
li x1, 0xB0000000
lw x1, 8(x1)
j fail
test14: //Trap store page fault
li x28, 14
la x30, test15
li TEST_ID, 14
la TRAP_RET, test15
li x1, 0xB0000000
sw x1, 8(x1)
j fail
test15: //Trap instruction fetch
li x28, 15
la x30, test15_end
li TEST_ID, 15
la TRAP_RET, test15_end
li x1, 0xB0000000
jr x1
j fail
@ -213,8 +224,8 @@ test15_end:
test16: //Test limited read access
li x28, 16
li x29, 0 //disable trap
li TEST_ID, 16
li TRAP_OK, 0 //disable trap
li x1, 0x90010008
li x2, 0x5B5A5958
@ -233,7 +244,7 @@ test16: //Test limited read access
bne x1, x2, fail
test17: //Test limited write access
li x28, 17
li TEST_ID, 17
li x1, 0x90011360
li x2, 0xAAEE0003
@ -242,7 +253,7 @@ test17: //Test limited write access
bne x1, x2, fail
test18: //Test limited execute access
li x28, 18
li TEST_ID, 18
la x1, test18_end
li x2, 0x90012010
@ -252,46 +263,166 @@ test18_end:
test19: //exception by access limitations
li x29, 1 //Allow trap
la x30, test19_readTrap
li TEST_ID, 19
li TRAP_OK, 1 //Allow trap
la TRAP_RET, test19_readTrap
li x1, 0x90012010
lw x1, 0(x1)
j fail
test19_readTrap:
la x30, test19_writeTrap
la TRAP_RET, test19_writeTrap
li x1, 0x90013010
sw x1, 0(x1)
j fail
test19_writeTrap:
la x30, test19_executeTrap
la TRAP_RET, test19_executeTrap
li x1, 0x90011010
jr x1
j fail
test19_executeTrap:
test20: //mxr set, read executable
li TEST_ID, 21
li TRAP_OK, 0
li x1, 1 << 19
csrs sstatus, x1
li x1, 0x90012008
li x2, 0x5B5A5958
lw x1, 0(x1)
bne x1, x2, fail
li x1, 1 << 19
csrc sstatus, x1
test21: //supervisor accessing not user
li TRAP_OK, 0
li TEST_ID, 20
li x1, 0x90014380
li x2, 0xAAEE0005
sw x2, 0(x1)
lw x1, 0(x1)
bne x1, x2, fail
li x1, 1 << 18 //clear SUM
csrc sstatus, x1
li TRAP_OK, 1
la TRAP_RET, test21_pass
li x1, 0x90011648
sw x1, 0(x1)
j fail
test21_pass:
test50: //User mode setup
li TEST_ID, 50
li TRAP_OK, 0
//set SUM
li x1, 1 << 18
csrs sstatus, x1
//remap code tlb into userspace
csrr x10, satp
csrw satp, x0
la x1, MMU_TABLE_1 + 0x000*4
li x2, 0x80000000
srli x2, x2, 2
ori x2, x2, 0x1F
sw x2, 0(x1)
csrw satp, x10
li x1, 1 << 8
csrc sstatus, x1 //clear SPP
la x1, test51
csrw sepc, x1
sfence.vma
sret
j fail
test51: //user read/write
li TEST_ID, 51
li x1, 0x90011008
li x2, 0x5B5A5958
lw x1, 0(x1)
bne x1, x2, fail
li x1, 0xA000A324
li x2, 0xAAEE0008
sw x2, 0(x1)
lw x1, 0(x1)
bne x1, x2, fail
test52: //user fetch
li TEST_ID, 52
la x1, test53
li x2, 0x90012010
jr x2
j fail
test53: // user fetch page fault
li TEST_ID, 53
li TRAP_OK, 1
la TRAP_RET, test54
li x1, 0x90014390
jr x1
j fail
test54: //user load page fault
li TEST_ID, 54
li TRAP_OK, 1
la TRAP_RET, test55
li x1, 0x90014394
lw x1, 0(x1)
j fail
test55: //user store page fault
li TEST_ID, 55
li TRAP_OK, 1
la TRAP_RET, test56
li x1, 0x90014398
sw x1, 0(x1)
j fail
test56:
j pass
fail: //x28 => error code
csrwi satp, 0
j failFence
fail: //TEST_ID => error code
li TRAP_OK, 0
ecall
failFence:
li x2, 0xF00FFF24
sw x28, 0(x2)
sw TEST_ID, 0(x2)
pass:
csrwi satp, 0
j passFence
li TRAP_OK, 2
ecall
passFence:
li x2, 0xF00FFF20
sw x0, 0(x2)
trap:
beq x29, x0, fail
beq TRAP_OK, x0, failFence
csrr x1, mcause
csrr x1, mepc
csrw mepc, x30
li x1, 2
beq TRAP_OK, x1, passFence
csrw mepc, TRAP_RET
mret

6
src/test/cpp/regression/main.cpp
View file

@ -736,7 +736,11 @@ public:
pcWrite(pc + 4);
}break;
default:
ilegalInstruction();
if((i & 0xFE007FFF) == 0x12000073){ //SFENCE.VMA
pcWrite(pc + 4);
}else {
ilegalInstruction();
}
break;
}
} else {