Manage cases where a rsp buffer is required

This commit is contained in:
Charles Papon 2019-09-05 10:30:33 +02:00
parent 6951f5b8e6
commit 5ac443b745
1 changed files with 12 additions and 5 deletions

View File

@ -4,7 +4,8 @@ import vexriscv.{DecoderService, Stageable, VexRiscv}
import spinal.core._ import spinal.core._
import spinal.lib._ import spinal.lib._
case class CfuParameter(latency : Int, case class CfuParameter(stageCount : Int,
allowZeroLatency : Boolean,
dropWidth : Int, dropWidth : Int,
CFU_VERSION : Int, CFU_VERSION : Int,
CFU_INTERFACE_ID_W : Int, CFU_INTERFACE_ID_W : Int,
@ -88,7 +89,7 @@ class CfuPlugin(val p: CfuParameter) extends Plugin[VexRiscv]{
import pipeline.config._ import pipeline.config._
val forkStage = execute val forkStage = execute
val joinStageId = Math.min(stages.length - 1, pipeline.indexOf(execute) + p.latency - 1) val joinStageId = Math.min(stages.length - 1, pipeline.indexOf(execute) + p.stageCount - 1)
val joinStage = stages(joinStageId) val joinStage = stages(joinStageId)
forkStage plug new Area{ forkStage plug new Area{
@ -110,10 +111,16 @@ class CfuPlugin(val p: CfuParameter) extends Plugin[VexRiscv]{
joinStage plug new Area{ joinStage plug new Area{
import joinStage._ import joinStage._
//If the CFU interface can produce a result combinatorialy and the fork stage isn't the same than the join stage
//Then it is required to add a buffer on rsp to not propagate the fork stage ready := False in the CPU pipeline.
val rsp = if(forkStage != joinStage && p.allowZeroLatency) bus.rsp.m2sPipe() else bus.rsp
when(input(CFU_IN_FLIGHT)){ when(input(CFU_IN_FLIGHT)){
arbitration.haltItself setWhen(!bus.rsp.valid) arbitration.haltItself setWhen(!rsp.valid)
bus.rsp.ready := arbitration.isStuckByOthers rsp.ready := arbitration.isStuckByOthers
output(REGFILE_WRITE_DATA) := bus.rsp.outputs(0) output(REGFILE_WRITE_DATA) := rsp.outputs(0)
} }
} }
} }