Manage cases where a rsp buffer is required
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6951f5b8e6
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@ -4,7 +4,8 @@ import vexriscv.{DecoderService, Stageable, VexRiscv}
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import spinal.core._
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import spinal.lib._
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case class CfuParameter(latency : Int,
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case class CfuParameter(stageCount : Int,
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allowZeroLatency : Boolean,
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dropWidth : Int,
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CFU_VERSION : Int,
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CFU_INTERFACE_ID_W : Int,
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@ -88,7 +89,7 @@ class CfuPlugin(val p: CfuParameter) extends Plugin[VexRiscv]{
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import pipeline.config._
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val forkStage = execute
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val joinStageId = Math.min(stages.length - 1, pipeline.indexOf(execute) + p.latency - 1)
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val joinStageId = Math.min(stages.length - 1, pipeline.indexOf(execute) + p.stageCount - 1)
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val joinStage = stages(joinStageId)
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forkStage plug new Area{
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@ -110,10 +111,16 @@ class CfuPlugin(val p: CfuParameter) extends Plugin[VexRiscv]{
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joinStage plug new Area{
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import joinStage._
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//If the CFU interface can produce a result combinatorialy and the fork stage isn't the same than the join stage
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//Then it is required to add a buffer on rsp to not propagate the fork stage ready := False in the CPU pipeline.
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val rsp = if(forkStage != joinStage && p.allowZeroLatency) bus.rsp.m2sPipe() else bus.rsp
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when(input(CFU_IN_FLIGHT)){
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arbitration.haltItself setWhen(!bus.rsp.valid)
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bus.rsp.ready := arbitration.isStuckByOthers
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output(REGFILE_WRITE_DATA) := bus.rsp.outputs(0)
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arbitration.haltItself setWhen(!rsp.valid)
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rsp.ready := arbitration.isStuckByOthers
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output(REGFILE_WRITE_DATA) := rsp.outputs(0)
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}
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}
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}
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