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CsrPlugin add openSbi config

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Dolu1990 2020-04-27 17:37:30 +02:00
parent 0c59dd9ed3
commit 5fd0b220cd
1 changed files with 40 additions and 0 deletions
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src/main/scala/vexriscv/plugin/CsrPlugin.scala
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@ -83,6 +83,46 @@ object CsrPluginConfig{
def all : CsrPluginConfig = all(0x00000020l)
def small : CsrPluginConfig = small(0x00000020l)
def smallest : CsrPluginConfig = smallest(0x00000020l)
def openSbi(hartId : Int, misa : Int) = CsrPluginConfig(
catchIllegalAccess = true,
mvendorid = 0,
marchid = 0,
mimpid = 0,
mhartid = hartId,
misaExtensionsInit = misa,
misaAccess = CsrAccess.READ_ONLY,
mtvecAccess = CsrAccess.READ_WRITE, //Could have been WRITE_ONLY :(
mtvecInit = null,
mepcAccess = CsrAccess.READ_WRITE,
mscratchGen = true,
mcauseAccess = CsrAccess.READ_ONLY,
mbadaddrAccess = CsrAccess.READ_ONLY,
mcycleAccess = CsrAccess.NONE,
minstretAccess = CsrAccess.NONE,
ucycleAccess = CsrAccess.NONE,
wfiGenAsWait = true,
ecallGen = true,
xtvecModeGen = false,
noCsrAlu = false,
wfiGenAsNop = false,
ebreakGen = false, //TODO
userGen = true,
supervisorGen = true,
sscratchGen = true,
stvecAccess = CsrAccess.READ_WRITE,
sepcAccess = CsrAccess.READ_WRITE,
scauseAccess = CsrAccess.READ_WRITE,
sbadaddrAccess = CsrAccess.READ_WRITE,
scycleAccess = CsrAccess.NONE,
sinstretAccess = CsrAccess.NONE,
satpAccess = CsrAccess.NONE,
medelegAccess = CsrAccess.READ_WRITE, //Could have been WRITE_ONLY :(
midelegAccess = CsrAccess.READ_WRITE, //Could have been WRITE_ONLY :(
pipelineCsrRead = false,
deterministicInteruptionEntry = false
)
def linuxMinimal(mtVecInit : BigInt) = CsrPluginConfig(
catchIllegalAccess = true,
mvendorid = 1,