Merge pull request #79 from antmicro/litex_target

Litex target
This commit is contained in:
Dolu1990 2019-07-20 02:59:42 +03:00 committed by GitHub
commit 6124ec7b14
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5 changed files with 89 additions and 4 deletions

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@ -4,7 +4,7 @@ ENTRY( _start )
MEMORY MEMORY
{ {
ram : ORIGIN = 0x80000000, LENGTH = 64k ram : ORIGIN = DEFINED(__ram_origin) ? __ram_origin : 0x80000000, LENGTH = 64k
} }

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@ -12,6 +12,17 @@ SRCS = $(wildcard src/*.c) \
LDSCRIPT = ${STANDALONE}/common/ram.ld LDSCRIPT = ${STANDALONE}/common/ram.ld
sim: CFLAGS += -DSIM
sim: all
qemu: CFLAGS += -DQEMU
qemu: all
litex: CFLAGS += -DLITEX -I${LITEX_BASE}/software/include
litex: | check_litex_base all
check_litex_base:
@[ "${LITEX_BASE}" ] || ( echo ">> LITEX_BASE is not set"; exit 1 )
include ${STANDALONE}/common/riscv64-unknown-elf.mk include ${STANDALONE}/common/riscv64-unknown-elf.mk
include ${STANDALONE}/common/standalone.mk include ${STANDALONE}/common/standalone.mk

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@ -1,9 +1,12 @@
#ifndef CONFIG_H #ifndef CONFIG_H
#define CONFIG_H #define CONFIG_H
//#define QEMU #ifndef OS_CALL
#define SIM
#define OS_CALL 0xC0000000 #define OS_CALL 0xC0000000
#endif
#ifndef DTB
#define DTB 0xC3000000 #define DTB 0xC3000000
#endif
#endif #endif

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@ -144,5 +144,76 @@ void halInit(){
#endif #endif
#ifdef LITEX
// this is copied from LiteX <hw/common.h>
#define CSR_ACCESSORS_DEFINED
static inline void csr_writeb(uint8_t value, unsigned long addr)
{
*((volatile uint8_t *)addr) = value;
}
static inline uint8_t csr_readb(unsigned long addr)
{
return *(volatile uint8_t *)addr;
}
static inline void csr_writew(uint16_t value, unsigned long addr)
{
*((volatile uint16_t *)addr) = value;
}
static inline uint16_t csr_readw(unsigned long addr)
{
return *(volatile uint16_t *)addr;
}
static inline void csr_writel(uint32_t value, unsigned long addr)
{
*((volatile uint32_t *)addr) = value;
}
static inline uint32_t csr_readl(unsigned long addr)
{
return *(volatile uint32_t *)addr;
}
// this is a file generated by LiteX
#include <generated/csr.h>
#if !defined(CSR_UART_BASE) || !defined(CSR_CPU_BASE)
#error LiteX configuration with uart and cpu_timer is required.
#endif
void stopSim(){
while(1);
}
void putC(char ch){
uart_rxtx_write(ch);
}
int32_t getC(){
return uart_rxempty_read()
? -1
: uart_rxtx_read();
}
uint32_t rdtime(){
return (uint32_t)cpu_timer_time_read();
}
uint32_t rdtimeh(){
return (uint32_t)(cpu_timer_time_read() >> 32);
}
void setMachineTimerCmp(uint32_t low, uint32_t high){
cpu_timer_time_cmp_write((((unsigned long long int)high) << 32) | low);
}
void halInit(){
}
#endif

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@ -161,7 +161,7 @@ void trap(){
#ifdef SIM #ifdef SIM
uint32_t instruction = csr_read(mbadaddr); uint32_t instruction = csr_read(mbadaddr);
#endif #endif
#ifdef QEMU #if defined(QEMU) || defined(LITEX)
uint32_t instruction = 0; uint32_t instruction = 0;
uint32_t i; uint32_t i;
if (mepc & 2) { if (mepc & 2) {