Hardware/VexRiscv
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Fix #44
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Dolu1990 2018-12-04 19:07:51 +01:00 committed by GitHub
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@ -159,7 +159,7 @@ You can find two example CPU instances in:
- src/main/scala/vexriscv/GenFull.scala
- src/main/scala/vexriscv/GenSmallest.scala
To generate the corresponding RTL as a VexRiscv.v file, run:
To generate the corresponding RTL as a VexRiscv.v file, run the following commands in the root directory of this repository:
```sh
sbt "run-main vexriscv.demo.GenFull"