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VexRiscv
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Create makefile targets 

Allow to change build target without modifiying the sources.
In order to keep compatibilty `sim` target is built by default.
This commit is contained in:
Mateusz Holenko 2019-07-10 10:39:47 +02:00 committed by Charles Papon
parent e76435c6c6
commit 64a2815544
2 changed files with 6 additions and 3 deletions
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6
src/main/c/emulator/makefile
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@ -12,6 +12,12 @@ SRCS = $(wildcard src/*.c) \
LDSCRIPT = ${STANDALONE}/common/ram.ld LDSCRIPT = ${STANDALONE}/common/ram.ld
sim: CFLAGS += -DSIM
sim: all
qemu: CFLAGS += -DQEMU
qemu: all
include ${STANDALONE}/common/riscv64-unknown-elf.mk include ${STANDALONE}/common/riscv64-unknown-elf.mk
include ${STANDALONE}/common/standalone.mk include ${STANDALONE}/common/standalone.mk

3
src/main/c/emulator/src/config.h
View File

@ -1,9 +1,6 @@
#ifndef CONFIG_H #ifndef CONFIG_H
#define CONFIG_H #define CONFIG_H
//#define QEMU
#define SIM
#ifndef OS_CALL #ifndef OS_CALL
#define OS_CALL 0xC0000000 #define OS_CALL 0xC0000000
#endif #endif