Improve subnormal/normal rounding
This commit is contained in:
Dolu1990
parent
de81da36eb
commit
81c193af1f
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@ -1004,7 +1004,7 @@ case class FpuCore( portCount : Int, p : FpuParameter) extends Component{
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output.roundMode := input.roundMode
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output.scrap := norm.scrap
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output.value := norm.output
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output.NV := NV //TODO isn't propagated in FMA
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output.NV := NV
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output.DZ := False
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decode.mulToAdd.valid := input.valid && input.add
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@ -1019,6 +1019,10 @@ case class FpuCore( portCount : Int, p : FpuParameter) extends Component{
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decode.mulToAdd.roundMode := input.roundMode
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if (p.withDouble) decode.mulToAdd.format := input.format
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when(NV){
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decode.mulToAdd.rs1.mantissa.msb := False
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}
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input.ready := (input.add ? decode.mulToAdd.ready | output.ready) || input.divSqrt
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}
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}
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@ -1558,7 +1562,23 @@ case class FpuCore( portCount : Int, p : FpuParameter) extends Component{
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val ufThreshold = muxDouble[UInt](input.format)(exponentF64Subnormal-52+1)(exponentF32Subnormal-23+1)
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val ofThreshold = muxDouble[UInt](input.format)(exponentF64Infinity-1)(exponentF32Infinity-1)
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when(!math.special && math.exponent <= ufSubnormalThreshold && roundAdjusted.asUInt =/= 0){ //Do not catch exact 1.17549435E-38 underflow, but, who realy care ?
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//catch exact 1.17549435E-38 underflow, but, who realy care ?
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// val borringCase = input.value.exponent === ufSubnormalThreshold && roundAdjusted.asUInt < U"11"
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// when(!math.special && (math.exponent <= ufSubnormalThreshold || borringCase) && roundAdjusted.asUInt =/= 0){
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// uf := True
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// }
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val threshold = input.roundMode.mux(
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FpuRoundMode.RNE -> U"110",
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FpuRoundMode.RTZ -> U"110",
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FpuRoundMode.RDN -> (input.value.sign ? U"101" | U"111"),
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FpuRoundMode.RUP -> (input.value.sign ? U"111" | U"101"),
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FpuRoundMode.RMM -> U"110"
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)
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val borringRound = (input.value.mantissa(1 downto 0) ## input.scrap)
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if(p.withDouble) when(input.format === FpuFormat.FLOAT) { borringRound := (input.value.mantissa(30 downto 29) ## input.value.mantissa(28 downto 0).orR)}
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val borringCase = input.value.exponent === ufSubnormalThreshold && borringRound.asUInt < threshold
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when(!math.special && (math.exponent <= ufSubnormalThreshold || borringCase) && roundAdjusted.asUInt =/= 0){
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uf := True
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}
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when(!math.special && math.exponent > ofThreshold){
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@ -1840,6 +1860,11 @@ cat all1.txt | grep "Errors found in"
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testfloat -tininessafter -all2 > all2.txt
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cat all2.txt | grep "Errors found in"
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testfloat -tininessafter -f32_mulAdd > fma.txt
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testfloat -tininessafter -all2 -level 2 -checkall > all2.txt
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all1 =>
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Errors found in f32_to_ui64_rx_minMag:
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@ -1848,28 +1873,29 @@ Errors found in f64_to_ui64_rx_minMag:
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Errors found in f64_to_i64_rx_minMag:
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all2 =>
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Errors found in f32_add, rounding near_even:
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Errors found in f32_add, rounding minMag:
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Errors found in f32_add, rounding min:
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Errors found in f32_add, rounding max:
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Errors found in f32_sub, rounding near_even:
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Errors found in f32_sub, rounding minMag:
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Errors found in f32_sub, rounding min:
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Errors found in f32_sub, rounding max:
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Errors found in f32_mul, rounding near_even:
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Errors found in f32_mul, rounding min:
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Errors found in f32_mul, rounding max:
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Errors found in f32_div, rounding near_even:
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Errors found in f32_div, rounding minMag:
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Errors found in f32_div, rounding min:
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Errors found in f32_div, rounding max:
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Errors found in f64_mul, rounding near_even:
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Errors found in f64_mul, rounding min:
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Errors found in f64_mul, rounding max:
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Errors found in f64_div, rounding near_even:
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Errors found in f64_div, rounding minMag:
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Errors found in f64_div, rounding min:
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Errors found in f64_div, rounding max:
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Errors found in f32_mulAdd, rounding min:
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+00.7FFFFF +67.000001 -01.000000
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=> -01.000000 ...ux expected -01.000000 ....x
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+67.000001 +00.7FFFFF -01.000000
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=> -01.000000 ...ux expected -01.000000 ....x
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-00.7FFFFF -67.000001 -01.000000
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=> -01.000000 ...ux expected -01.000000 ....x
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-67.000001 -00.7FFFFF -01.000000
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=> -01.000000 ...ux expected -01.000000 ....x
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Errors found in f32_mulAdd, rounding max:
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+00.7FFFFF -67.000001 +01.000000
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=> +01.000000 ...ux expected +01.000000 ....x
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+67.000001 -00.7FFFFF +01.000000
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=> +01.000000 ...ux expected +01.000000 ....x
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+66.7FFFFE -01.000001 +01.000000
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=> +01.000000 ...ux expected +01.000000 ....x
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-00.7FFFFF +67.000001 +01.000000
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=> +01.000000 ...ux expected +01.000000 ....x
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-67.000001 +00.7FFFFF +01.000000
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=> +01.000000 ...ux expected +01.000000 ....x
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*/
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@ -43,6 +43,10 @@ void applyRounding(int rounding){
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#define toF32(v) (*((float32_t*)&v))
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#define fromF32(x) (*((float*)&(x.v)))
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#define toF64(v) (*((float64_t*)&v))
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#define fromF64(x) (*((double*)&(x.v)))
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JNIEXPORT jfloat API JNICALL Java_vexriscv_ip_fpu_FpuMath_addF32(JNIEnv * env, jobject obj, jfloat a, jfloat b, jint rounding){
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applyRounding(rounding);
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float32_t v = f32_add(toF32(a), toF32(b));
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@ -54,3 +58,22 @@ JNIEXPORT jfloat API JNICALL Java_vexriscv_ip_fpu_FpuMath_mulF32(JNIEnv * env, j
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float32_t v = f32_mul(toF32(a), toF32(b));
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return fromF32(v);
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}
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JNIEXPORT jint API JNICALL Java_vexriscv_ip_fpu_FpuMath_mulFlagF32(JNIEnv * env, jobject obj, jfloat a, jfloat b, jint rounding){
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applyRounding(rounding);
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softfloat_exceptionFlags = 0;
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float32_t v = f32_mul(toF32(a), toF32(b));
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return softfloat_exceptionFlags;
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}
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JNIEXPORT jfloat API JNICALL Java_vexriscv_ip_fpu_FpuMath_d2f(JNIEnv * env, jobject obj, jdouble a, jint rounding){
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applyRounding(rounding);
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float32_t v = f64_to_f32(toF64(a));
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return fromF32(v);
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}
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JNIEXPORT jint API JNICALL Java_vexriscv_ip_fpu_FpuMath_d2fFlag(JNIEnv * env, jobject obj, jdouble a, jint rounding){
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applyRounding(rounding);
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softfloat_exceptionFlags = 0;
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float32_t v = f64_to_f32(toF64(a));
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return softfloat_exceptionFlags;
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}
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@ -5,6 +5,9 @@ import java.io.File;
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public class FpuMath {
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public native float addF32(float a, float b, int rounding);
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public native float mulF32(float a, float b, int rounding);
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public native int mulFlagF32(float a, float b, int rounding);
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public native float d2f(double a, int rounding);
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public native int d2fFlag(double a, int rounding);
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static{
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System.load(new File("src/test/cpp/fpu/math/fpu_math.so").getAbsolutePath());
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@ -59,7 +59,7 @@ class FpuTest extends FunSuite{
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val config = SimConfig
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config.allOptimisation
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config.withFstWave
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// config.withFstWave
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config.compile(new FpuCore(portCount, p){
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for(i <- 0 until portCount) out(Bits(5 bits)).setName(s"flagAcc$i") := io.port(i).completion.flags.asBits
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setDefinitionName("FpuCore"+ (if(p.withDouble) "Double" else ""))
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@ -206,18 +206,18 @@ class FpuTest extends FunSuite{
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def softAssert(cond : Boolean, msg : String) = if(!cond)println(msg)
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def flagMatch(ref : Int, value : Float, report : String): Unit ={
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val patch = if(value.abs == 1.17549435E-38f) ref & ~2 else ref
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flagMatch(patch, report)
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val patch = if(value.abs == 1.17549435E-38f && false) 0x1f & ~2 else 0x1f
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flagMatch(ref, report, patch)
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}
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def flagMatch(ref : Int, value : Double, report : String): Unit ={
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val patch = if(value.abs == b2d(1 << 52)) ref & ~2 else ref
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flagMatch(patch, report)
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val patch = if(value.abs == b2d(1 << 52) && false) 0x1f & ~2 else 0x1f
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flagMatch(ref, report, patch)
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}
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def flagMatch(ref : Int, report : String): Unit ={
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def flagMatch(ref : Int, report : String, mask : Int = 0x1f): Unit ={
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waitUntil(pendingMiaou == 0)
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assert(flagAccumulator == ref, s"Flag missmatch dut=$flagAccumulator ref=$ref $report")
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assert((flagAccumulator & mask) == (ref & mask), s"Flag missmatch dut=$flagAccumulator ref=$ref $report")
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flagAccumulator = 0
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}
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def flagClear(): Unit ={
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@ -1257,26 +1257,68 @@ class FpuTest extends FunSuite{
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var fxxTests = f32Tests
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if(p.withDouble) fxxTests ++= f64Tests
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//5071920 5225560
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// for(v <- List(-1.17549435082e-38f, 1.17549435082e-38f);
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// rounding <- FpuRoundMode.elements) {
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// for (i <- 0 until 2048) {
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// val b = d2b(v)// 0x0010000000000000l //d2b(1.17549435082e-38)
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// val s = (b - (i.toLong << 21)).toLong
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// val d = b2d(s)
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//// val rounding = FpuRoundMode.RNE
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// testCvtF64F32Raw(d, Clib.math.d2f(d, rounding.position), Clib.math.d2fFlag(d, rounding.position), rounding)
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// }
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// }
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//
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//
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// testCvtF64F32Raw(-1.1754943508051483E-38, -1.17549435E-38f, 1, FpuRoundMode.RNE)
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// testCvtF64F32Raw( 1.1754943157898258E-38, 1.17549435E-38f , 3, FpuRoundMode.RMM)
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// testCvtF64F32Raw( 1.1754942807573643E-38, 1.17549435E-38f , 3, FpuRoundMode.RMM)
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// testCvtF64F32Raw(-1.1754943508051483E-38, -1.17549435E-38f, 1, FpuRoundMode.RMM)
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//-1.1754943508051483E-38 -1.17549435E-38 1 RNE @ 592770
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// 1.1754943157898258E-38 1.17549435E-38 3 RMM @ 2697440
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// 1.1754942807573643E-38 1.17549435E-38 3 RMM
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// for(_ <- 0 until 1000000) testCvtF64F32() // 1 did not equal 3 Flag missmatch dut=1 ref=3 testCvtF64F32Raw 1.1754942807573643E-38 1.17549435E-38 RMM
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// println("FCVT_D_S done")
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// testBinaryOpF64(div, -2.2250738564511294E-308, 4.294967296003891E9, -5.180654E-318, 1, FpuRoundMode.RDN,"div") // ??? wtf
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// testBinaryOp(add,b2f(0x7F800000),b2f(0x1FD << 23),b2f(0x7F800000),0, FpuRoundMode.RNE,"add")
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for(_ <- 0 until 1000000) testDivF64()
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println("f64 div done")
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for(_ <- 0 until 10000) testDiv()
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println("f32 div done")
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for(_ <- 0 until 10000) testAddF32()
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for(_ <- 0 until 10000) testSubF32()
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println("Add done")
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for(_ <- 0 until 10000) testSqrt()
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println("f32 sqrt done")
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// testBinaryOp(mul,1.1753509E-38f, 1.0001221f ,1.17549435E-38f,1, FpuRoundMode.RNE,"mul")
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//
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// for(i <- 0 until 10000000){
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// val rounding = FpuRoundMode.elements.randomPick()
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// val (a,b,c,f) = f32.mul(rounding).f32_f32_f32
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// testBinaryOp(mul,a,b,c,f, rounding,"mul")
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// }
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//
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// testBinaryOpF64(mul,2.781342323134002E-309, 7.999999999999999, 2.2250738585072014E-308, 3, FpuRoundMode.RNE,"mul")
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//// for(i <- 0 until 10000000){
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//// val rounding = FpuRoundMode.RNE
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//// val (a,b,c,f) = f64.mul(rounding).f64_f64_f64
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//// testBinaryOpF64(mul,a,b,c,f, rounding,"mul")
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//// }
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// for(_ <- 0 until 100000000) testMulF64()
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// println("f64 Mul done")
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//
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// for(_ <- 0 until 10000) testDivF64()
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// println("f64 div done")
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//
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//
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// for(_ <- 0 until 10000) testDiv()
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// println("f32 div done")
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//
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// for(_ <- 0 until 10000) testAddF32()
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// for(_ <- 0 until 10000) testSubF32()
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//
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// println("Add done")
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//
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//
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// for(_ <- 0 until 10000) testSqrt()
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// println("f32 sqrt done")
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@ -1533,8 +1575,8 @@ class FpuTest extends FunSuite{
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// DoCmd.doCmd(cmd)
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// val math = new FpuMath
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//}
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//// cd /media/data/open/SaxonSoc/testFloatBuild/berkeley-softfloat-3/build/Linux-x86_64-GCC
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//// make clean && SPECIALIZE_TYPE=RISCV make -j$(nproc) && cp softfloat.a /media/data/open/SaxonSoc/artyA7SmpUpdate/SaxonSoc/ext/VexRiscv/src/test/cpp/fpu/math
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// cd /media/data/open/SaxonSoc/testFloatBuild/berkeley-softfloat-3/build/Linux-x86_64-GCC
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// make clean && SPECIALIZE_TYPE=RISCV make -j$(nproc) && cp softfloat.a /media/data/open/SaxonSoc/artyA7SmpUpdate/SaxonSoc/ext/VexRiscv/src/test/cpp/fpu/math
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//object FpuCompileSo extends App{
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//
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//// val b2f = lang.Float.intBitsToFloat(_)
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@ -1548,29 +1590,52 @@ class FpuTest extends FunSuite{
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//// miaou ffffffff 7fffffe0 7f
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//// miaou 0 3ffffff0 70 = 0
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//
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// val b2f = lang.Float.intBitsToFloat(_)
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// val b2d = lang.Double.longBitsToDouble(_)
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// val f2b = lang.Float.floatToRawIntBits(_)
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// val d2bOffset = BigInt("10000000000000000",16)
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// def d2b(that : Double) = {
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// val l = lang.Double.doubleToRawLongBits(that)
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// var a = BigInt(l)
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// if(l < 0) {
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// a = d2bOffset + a
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// }
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// a
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// }
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// val builder =new StringBuilder()
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// for(i <- 0 until 256){
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//// builder ++= (Clib.math.mulF32(1.17548538251e-38f, b2f(f2b(1.0f)+i),0)).toString + "\n"
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// val b = d2b(1.17549435082e-38)
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// val s = (b-(i.toLong << 25)).toLong
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// val d = b2d(s)
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// builder ++= f"$b $s $d => "
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// builder ++= f"${d2b(d)}%x " + (Clib.math.d2fFlag(d,0)).toString + " " + d + " => " + (Clib.math.d2f(d,FpuRoundMode.RMM.position)).toString + "\n"
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// }
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//
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// Thread.sleep(400)
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// println(builder.toString)
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// println(Clib.math.mulF32( 1.1753509E-38f, 1.0001221f, FpuRoundMode.RUP.position))
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// println(Clib.math.mulF32( 1.1754945E-38f, 0.9999998f, FpuRoundMode.RUP.position))
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//// testBinaryOp(mul, 1.1753509E-38f, 1.0001221f, 1.17549435E-38f ,1, FpuRoundMode.RUP,"mul")
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//// testBinaryOp(mul, 1.1754945E-38f, 0.9999998f, 1.17549435E-38f, 3, FpuRoundMode.RUP, "mul")
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//// miaou ffffffff 7fffffe0 7f
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//// miaou 0 3ffffff0 70 = 0
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//// miaou ffffffff 7fffff7e 7f
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//// miaou 1 3fffffbf 3f = 1
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//
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//// println(Clib.math.mulF32( 1.1753509E-38f, 1.0001221f, FpuRoundMode.RUP.position))
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//// println(Clib.math.mulF32( 1.469368E-39f, 7.9999995f, FpuRoundMode.RUP.position))
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//// println(Clib.math.mulF32( 1.40129846432e-45f, 7.9999995f, FpuRoundMode.RUP.position))
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//// println(Clib.math.mulF32( 2.93873587706e-39f, 7.9999995f, FpuRoundMode.RUP.position))
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//// println(Clib.math.mulF32( 1f, 7.9999995f, FpuRoundMode.RUP.position))
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//
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//
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//// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RNE.position))
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//// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RTZ.position))
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//// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RDN.position))
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//// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RUP.position))
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// testBinaryOp(mul, 1.1753509E-38f, 1.0001221f, 1.17549435E-38f ,1, FpuRoundMode.RUP,"mul")
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// testBinaryOp(mul, 1.1754945E-38f, 0.9999998f, 1.17549435E-38f, 3, FpuRoundMode.RUP, "mul")
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// miaou ffffffff 7fffffe0 7f
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// miaou 0 3ffffff0 70 = 0
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// miaou ffffffff 7fffff7e 7f
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// miaou 1 3fffffbf 3f = 1
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// println(Clib.math.mulF32( 1.1753509E-38f, 1.0001221f, FpuRoundMode.RUP.position))
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// println(Clib.math.mulF32( 1.469368E-39f, 7.9999995f, FpuRoundMode.RUP.position))
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// println(Clib.math.mulF32( 1.40129846432e-45f, 7.9999995f, FpuRoundMode.RUP.position))
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// println(Clib.math.mulF32( 2.93873587706e-39f, 7.9999995f, FpuRoundMode.RUP.position))
|
||||
// println(Clib.math.mulF32( 1f, 7.9999995f, FpuRoundMode.RUP.position))
|
||||
|
||||
|
||||
// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RNE.position))
|
||||
// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RTZ.position))
|
||||
// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RDN.position))
|
||||
// println(Clib.math.addF32(1.00000011921f, 4.0f, FpuRoundMode.RUP.position))
|
||||
//}
|
||||
//
|
||||
|
||||
class ProcessStream(cmd : String){
|
||||
import sys.process._
|
||||
|
||||
|
|
@ -1590,19 +1655,4 @@ class ProcessStream(cmd : String){
|
|||
buf.dequeue()()
|
||||
}
|
||||
}
|
||||
//
|
||||
//object TestSoftFloat extends App{
|
||||
// val p = new ProcessStream("testfloat_gen -forever f32_add")
|
||||
// Thread.sleep(1000)
|
||||
// println(p.next)
|
||||
// println(p.next)
|
||||
// println(p.next)
|
||||
// println(p.next)
|
||||
// println(p.next)
|
||||
// Thread.sleep(1000)
|
||||
// println(p.next)
|
||||
// while(true) {
|
||||
// Thread.sleep(10)
|
||||
// println(p.next)
|
||||
// }
|
||||
//}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue