Merge pull request #80 from antmicro/fix_litex_target
Fix handling LiteX uart and timer.
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commit
84602f89b0
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@ -190,28 +190,44 @@ void stopSim(){
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}
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void putC(char ch){
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// protect against writing to a full tx fifo
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while(uart_txfull_read());
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uart_rxtx_write(ch);
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}
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int32_t getC(){
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return uart_rxempty_read()
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? -1
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: uart_rxtx_read();
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if(uart_rxempty_read())
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{
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return -1;
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}
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// this is required to refresh rexempty status
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uart_ev_pending_write(1 << 1);
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return uart_rxtx_read();
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}
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uint32_t rdtime(){
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return (uint32_t)cpu_timer_time_read();
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cpu_timer_latch_write(0);
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uint32_t result = (uint32_t)cpu_timer_time_read();
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cpu_timer_latch_write(1);
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return result;
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}
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uint32_t rdtimeh(){
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return (uint32_t)(cpu_timer_time_read() >> 32);
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cpu_timer_latch_write(0);
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uint32_t result = (uint32_t)(cpu_timer_time_read() >> 32);
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cpu_timer_latch_write(1);
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return result;
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}
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void setMachineTimerCmp(uint32_t low, uint32_t high){
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cpu_timer_latch_write(0);
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cpu_timer_time_cmp_write((((unsigned long long int)high) << 32) | low);
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cpu_timer_latch_write(1);
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}
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void halInit(){
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cpu_timer_latch_write(1);
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}
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#endif
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