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GDB + openOCD successfully connect !

This commit is contained in:
Charles Papon 2017-05-25 13:36:54 +02:00
parent 75f6b78daf
commit 8dddc7e334
3 changed files with 64 additions and 57 deletions
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98
src/main/scala/SpinalRiscv/TopLevel.scala
View File

@ -105,57 +105,57 @@ object TopLevel {
val configFull = VexRiscvConfig(
plugins = List(
new PcManagerSimplePlugin(0x00000000l, false),
// new IBusSimplePlugin(
// interfaceKeepData = true,
// catchAccessFault = true
new IBusSimplePlugin(
interfaceKeepData = true,
catchAccessFault = true
),
// new IBusCachedPlugin(
// config = InstructionCacheConfig(
// cacheSize = 4096,
// bytePerLine =32,
// wayCount = 1,
// wrappedMemAccess = true,
// addressWidth = 32,
// cpuDataWidth = 32,
// memDataWidth = 32,
// catchIllegalAccess = true,
// catchAccessFault = true,
// catchMemoryTranslationMiss = true,
// asyncTagMemory = false,
// twoStageLogic = true
// ),
// askMemoryTranslation = true,
// memoryTranslatorPortConfig = MemoryTranslatorPortConfig(
// portTlbSize = 4
// )
// ),
new IBusCachedPlugin(
config = InstructionCacheConfig(
cacheSize = 4096,
bytePerLine =32,
wayCount = 1,
wrappedMemAccess = true,
addressWidth = 32,
cpuDataWidth = 32,
memDataWidth = 32,
catchIllegalAccess = true,
catchAccessFault = true,
catchMemoryTranslationMiss = true,
asyncTagMemory = false,
twoStageLogic = true
),
askMemoryTranslation = true,
memoryTranslatorPortConfig = MemoryTranslatorPortConfig(
portTlbSize = 4
)
),
// new DBusSimplePlugin(
// catchAddressMisaligned = true,
// catchAccessFault = true
// ),
new DBusCachedPlugin(
config = new DataCacheConfig(
cacheSize = 4096,
bytePerLine = 32,
wayCount = 1,
addressWidth = 32,
cpuDataWidth = 32,
memDataWidth = 32,
catchAccessError = true,
catchIllegal = true,
catchUnaligned = true,
catchMemoryTranslationMiss = true
),
askMemoryTranslation = true,
memoryTranslatorPortConfig = MemoryTranslatorPortConfig(
portTlbSize = 6
)
),
new MemoryTranslatorPlugin(
tlbSize = 32,
virtualRange = _(31 downto 28) === 0xC,
ioRange = _(31 downto 28) === 0xF
new DBusSimplePlugin(
catchAddressMisaligned = true,
catchAccessFault = true
),
// new DBusCachedPlugin(
// config = new DataCacheConfig(
// cacheSize = 4096,
// bytePerLine = 32,
// wayCount = 1,
// addressWidth = 32,
// cpuDataWidth = 32,
// memDataWidth = 32,
// catchAccessError = true,
// catchIllegal = true,
// catchUnaligned = true,
// catchMemoryTranslationMiss = true
// ),
// askMemoryTranslation = true,
// memoryTranslatorPortConfig = MemoryTranslatorPortConfig(
// portTlbSize = 6
// )
// ),
// new MemoryTranslatorPlugin(
// tlbSize = 32,
// virtualRange = _(31 downto 28) === 0xC,
// ioRange = _(31 downto 28) === 0xF
// ),
new DecoderSimplePlugin(
catchIllegalInstruction = true
),

15
src/test/cpp/regression/main.cpp
View File

@ -715,6 +715,12 @@ public:
top->debugReset = 0;
}
void connectionReset(){
printf("CONNECTION RESET\n");
shutdown(clientHandle,SHUT_RDWR);
clientHandle = -1;
}
bool readRsp = false;
virtual void preCycle(){
if(clientHandle == -1){
@ -729,7 +735,7 @@ public:
}
if(readRsp){
if(clientHandle != -1){
send(clientHandle,&top->debug_bus_rsp_data,4,0);
if(send(clientHandle,&top->debug_bus_rsp_data,4,0) == -1) connectionReset();
}
readRsp = false;
}
@ -766,14 +772,15 @@ public:
timeSpacer = 50;
} else {
bool dummy;
printf("wr=%d size=%d address=%x data=%x\n",wr,size,address,data);
ws->dBusAccess(address,wr,size,0xFFFFFFFF, &data, &dummy);
if(!wr){
send(clientHandle,&data,4,0);
if(-1 == send(clientHandle,&data,4,0)) connectionReset();
}
}
} else if(n == 0){
printf("Socket read error");
} else {
connectionReset();
}
} else {
timeSpacer--;

8
src/test/cpp/regression/makefile
View File

@ -1,7 +1,7 @@
IBUS=IBUS_CACHED
DBUS=DBUS_CACHED
TRACE=yes
TRACE_ACCESS=yes
IBUS=IBUS_SIMPLE
DBUS=DBUS_SIMPLE
TRACE?=no
TRACE_ACCESS=no
TRACE_START=0
CSR=yes
MMU=yes