Fpu now set csr status fs on FPU csr write
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@ -219,6 +219,9 @@ class FpuPlugin(externalFpu : Boolean = false,
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when(stages.last.arbitration.isFiring && stages.last.input(FPU_ENABLE) && stages.last.input(FPU_OPCODE) =/= FpuOpcode.STORE){
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fs := 3 //DIRTY
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}
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when(List(CSR.FRM, CSR.FCSR, CSR.FFLAGS).map(id => service.isWriting(id)).orR){
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fs := 3
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}
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service.rw(CSR.SSTATUS, 13, fs)
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service.rw(CSR.MSTATUS, 13, fs)
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@ -668,9 +668,9 @@ public:
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case SATP: satp.raw = value; break;
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#ifdef RVF
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case FCSR: fcsr.raw = value & 0x7F; break;
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case FRM: fcsr.frm = value; break;
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case FFLAGS: fcsr.flags = value; break;
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case FCSR: fcsr.raw = value & 0x7F; status.fs = 3; break;
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case FRM: fcsr.frm = value; status.fs = 3; break;
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case FFLAGS: fcsr.flags = value; status.fs = 3; break;
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#endif
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default: ilegalInstruction(); return true; break;
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