Add missing full config for the iBus
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@ -141,13 +141,13 @@ object VexRiscvAxi4WithIntegratedJtag{
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for (plugin <- cpuConfig.plugins) plugin match {
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for (plugin <- cpuConfig.plugins) plugin match {
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case plugin: IBusSimplePlugin => {
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case plugin: IBusSimplePlugin => {
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plugin.iBus.asDirectionLess() //Unset IO properties of iBus
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plugin.iBus.asDirectionLess() //Unset IO properties of iBus
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iBus = master(plugin.iBus.toAxi4ReadOnly())
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iBus = master(plugin.iBus.toAxi4ReadOnly().toFullConfig())
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.setName("iBusAxi")
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.setName("iBusAxi")
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.addTag(ClockDomainTag(ClockDomain.current)) //Specify a clock domain to the iBus (used by QSysify)
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.addTag(ClockDomainTag(ClockDomain.current)) //Specify a clock domain to the iBus (used by QSysify)
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}
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}
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case plugin: IBusCachedPlugin => {
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case plugin: IBusCachedPlugin => {
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plugin.iBus.asDirectionLess() //Unset IO properties of iBus
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plugin.iBus.asDirectionLess() //Unset IO properties of iBus
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iBus = master(plugin.iBus.toAxi4ReadOnly())
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iBus = master(plugin.iBus.toAxi4ReadOnly().toFullConfig())
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.setName("iBusAxi")
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.setName("iBusAxi")
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.addTag(ClockDomainTag(ClockDomain.current)) //Specify a clock domain to the iBus (used by QSysify)
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.addTag(ClockDomainTag(ClockDomain.current)) //Specify a clock domain to the iBus (used by QSysify)
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}
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}
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