Update README.md

README.md

@@ -7,9 +7,9 @@
 - [CPU generation](#cpu-generation)
 - [Regression tests](#regression-tests)
 - [Interactive debug of the simulated CPU via GDB OpenOCD and Verilator](#interactive-debug-of-the-simulated-cpu-via-gdb-openocd-and-verilator)
-- [Using Eclipse to run and debug the software](#using-Eclipse-to-run-and-debug-the-software)
-  * [By using gnu-mcu-eclipse](#by-using-gnu-mcu-eclipse)
-  * [By using Zylin plugin (old)](#by-using-zylin-plugin-old)
+- [Using Eclipse to run and debug the software](#using-eclipse-to-run-and-debug-the-software)
+  - [By using gnu-mcu-eclipse](#by-using-gnu-mcu-eclipse)
+  - [By using Zylin plugin (old)](#by-using-zylin-plugin-old)
 - [Briey SoC](#briey-soc)
 - [Murax SoC](#murax-soc)
 - [Running Linux](#running-linux)
@@ -19,7 +19,32 @@
 - [Adding a new CSR via the plugin system](#adding-a-new-csr-via-the-plugin-system)
 - [CPU clock and resets](#cpu-clock-and-resets)
 - [VexRiscv Architecture](#vexriscv-architecture)
-  * [Plugins](#plugins)
+  - [Plugins](#plugins)
+    - [IBusSimplePlugin](#ibussimpleplugin)
+    - [IBusCachedPlugin](#ibuscachedplugin)
+    - [DecoderSimplePlugin](#decodersimpleplugin)
+    - [RegFilePlugin](#regfileplugin)
+    - [HazardSimplePlugin](#hazardsimpleplugin)
+    - [SrcPlugin](#srcplugin)
+    - [IntAluPlugin](#intaluplugin)
+    - [LightShifterPlugin](#lightshifterplugin)
+    - [FullBarrelShifterPlugin](#fullbarrelshifterplugin)
+    - [BranchPlugin](#branchplugin)
+      - [Prediction NONE](#prediction-none)
+      - [Prediction STATIC](#prediction-static)
+      - [Prediction DYNAMIC](#prediction-dynamic)
+      - [Prediction DYNAMIC_TARGET](#prediction-dynamic_target)
+    - [DBusSimplePlugin](#dbussimpleplugin)
+    - [DBusCachedPlugin](#dbuscachedplugin)
+    - [MulPlugin](#mulplugin)
+    - [DivPlugin](#divplugin)
+    - [MulDivIterativePlugin](#muldiviterativeplugin)
+    - [CsrPlugin](#csrplugin)
+    - [StaticMemoryTranslatorPlugin](#staticmemorytranslatorplugin)
+    - [MmuPlugin](#mmuplugin)
+    - [PmpPlugin](#pmpplugin)
+    - [DebugPlugin](#debugplugin)
+    - [YamlPlugin](#yamlplugin)
 
 
 
@@ -672,26 +697,51 @@ and everything else, including the program counter is added into the CPU via plu
 
 This chapter describes the currently implemented plugins.
 
-- [IBusSimplePlugin](#ibussimpleplugin)
-- [IBusCachedPlugin](#ibuscachedplugin)
-- [DecoderSimplePlugin](#decodersimpleplugin)
-- [RegFilePlugin](#regfileplugin)
-- [HazardSimplePlugin](#hazardsimpleplugin)
-- [SrcPlugin](#srcplugin)
-- [IntAluPlugin](#intaluplugin)
-- [LightShifterPlugin](#lightshifterplugin)
-- [FullBarrelShifterPlugin](#fullbarrelshifterplugin)
-- [BranchPlugin](#branchplugin)
-- [DBusSimplePlugin](#dbussimpleplugin)
-- [DBusCachedPlugin](#dbuscachedplugin)
-- [MulPlugin](#mulplugin)
-- [DivPlugin](#divplugin)
-- [MulDivIterativePlugin](#muldiviterativeplugin)
-- [CsrPlugin](#csrplugin)
-- [StaticMemoryTranslatorPlugin](#staticmemorytranslatorplugin)
-- [MemoryTranslatorPlugin](#memorytranslatorplugin)
-- [DebugPlugin](#debugplugin)
-- [YamlPlugin](#yamlplugin)
+- [Index](#index)
+- [Description](#description)
+- [Area usage and maximal frequency](#area-usage-and-maximal-frequency)
+- [Dependencies](#dependencies)
+- [CPU generation](#cpu-generation)
+- [Regression tests](#regression-tests)
+- [Interactive debug of the simulated CPU via GDB OpenOCD and Verilator](#interactive-debug-of-the-simulated-cpu-via-gdb-openocd-and-verilator)
+- [Using Eclipse to run and debug the software](#using-eclipse-to-run-and-debug-the-software)
+  - [By using gnu-mcu-eclipse](#by-using-gnu-mcu-eclipse)
+  - [By using Zylin plugin (old)](#by-using-zylin-plugin-old)
+- [Briey SoC](#briey-soc)
+- [Murax SoC](#murax-soc)
+- [Running Linux](#running-linux)
+- [Build the RISC-V GCC](#build-the-risc-v-gcc)
+- [CPU parametrization and instantiation example](#cpu-parametrization-and-instantiation-example)
+- [Add a custom instruction to the CPU via the plugin system](#add-a-custom-instruction-to-the-cpu-via-the-plugin-system)
+- [Adding a new CSR via the plugin system](#adding-a-new-csr-via-the-plugin-system)
+- [CPU clock and resets](#cpu-clock-and-resets)
+- [VexRiscv Architecture](#vexriscv-architecture)
+  - [Plugins](#plugins)
+    - [IBusSimplePlugin](#ibussimpleplugin)
+    - [IBusCachedPlugin](#ibuscachedplugin)
+    - [DecoderSimplePlugin](#decodersimpleplugin)
+    - [RegFilePlugin](#regfileplugin)
+    - [HazardSimplePlugin](#hazardsimpleplugin)
+    - [SrcPlugin](#srcplugin)
+    - [IntAluPlugin](#intaluplugin)
+    - [LightShifterPlugin](#lightshifterplugin)
+    - [FullBarrelShifterPlugin](#fullbarrelshifterplugin)
+    - [BranchPlugin](#branchplugin)
+      - [Prediction NONE](#prediction-none)
+      - [Prediction STATIC](#prediction-static)
+      - [Prediction DYNAMIC](#prediction-dynamic)
+      - [Prediction DYNAMIC_TARGET](#prediction-dynamic_target)
+    - [DBusSimplePlugin](#dbussimpleplugin)
+    - [DBusCachedPlugin](#dbuscachedplugin)
+    - [MulPlugin](#mulplugin)
+    - [DivPlugin](#divplugin)
+    - [MulDivIterativePlugin](#muldiviterativeplugin)
+    - [CsrPlugin](#csrplugin)
+    - [StaticMemoryTranslatorPlugin](#staticmemorytranslatorplugin)
+    - [MmuPlugin](#mmuplugin)
+    - [PmpPlugin](#pmpplugin)
+    - [DebugPlugin](#debugplugin)
+    - [YamlPlugin](#yamlplugin)
 
 
 #### IBusSimplePlugin
@@ -1027,6 +1077,10 @@ Static memory translator plugin which allows to specify which range of the memor
 Hardware refilled MMU implementation. Allows other plugins such as DBusCachedPlugin/IBusCachedPlugin to instanciate memory address translation ports. Each port has a small dedicated
 fully associative TLB cache which is refilled automaticaly via a dbus access sharing.
 
+#### PmpPlugin
+
+This is a physical memory protection (PMP) plugin which conforms to the latest RISC-V privilege specification. PMP is configured by writing two special CSRs: `pmpcfg#` and `pmpaddr#`. The former contains the permissions and addressing modes for four protection regions, and the latter contains the encoded start address for a single region. Since the actual region bounds must be computed from the values written to these registers, writing them takes a few CPU cylces: (5 for `pmpcfg#` and 2-3 for `pmpaddr#`). This delay is necessary in order to centralize all of the decoding logic into a single component. Otherwise, it would have to be duplicated for each region, even though the decoding operation happens only when PMP is reprogrammed (e.g., on some context switches).
+
 #### DebugPlugin
 
 This plugin implements enough CPU debug features to allow comfortable GDB/Eclipse debugging. To access those debug features, it provides a simple memory bus interface.