Readme add information about the Murax with a demo program in ROM
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@ -251,7 +251,12 @@ You can find its implementation there : src/main/scala/vexriscv/demo/Murax.scala
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To generate the Murax SoC Hardware :
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To generate the Murax SoC Hardware :
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```sh
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```sh
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# To generate the SoC without any content in the ram
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sbt "run-main vexriscv.demo.Murax"
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sbt "run-main vexriscv.demo.Murax"
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# To generate the SoC with a demo program in the SoC
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# Will blink led and echo UART RX to UART TX (in the verilator sim, type some text and press enter to send UART frames to the Murax RX pin)
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sbt "run-main vexriscv.demo.MuraxWithRamInit"
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```
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```
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Then go in src/test/cpp/murax and run the simulation with :
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Then go in src/test/cpp/murax and run the simulation with :
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