Hardware
/
VexRiscv
mirror of https://github.com/SpinalHDL/VexRiscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix DYNAMIC_TARGET from triggering fetch missprediction while in debug mode #254

This commit is contained in:
Dolu1990 2022-05-17 15:27:31 +02:00
parent 78f0a7f13e
commit a553d3b476
2 changed files with 11 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/main/scala/vexriscv/plugin/BranchPlugin.scala
View File

@ -46,6 +46,7 @@ case class FetchPredictionBus(stage : Stage) extends Bundle {
trait PredictionInterface{
def askFetchPrediction() : FetchPredictionBus
def askDecodePrediction() : DecodePredictionBus
def inDebugNoFetch() : Unit
}
@ -68,6 +69,7 @@ class BranchPlugin(earlyBranch : Boolean,
var jumpInterface : Flow[UInt] = null
var predictionExceptionPort : Flow[ExceptionCause] = null
var branchExceptionPort : Flow[ExceptionCause] = null
var inDebugNoFetchFlag : Bool = null
var decodePrediction : DecodePredictionBus = null
@ -84,6 +86,9 @@ class BranchPlugin(earlyBranch : Boolean,
decodePrediction
}
override def inDebugNoFetch(): Unit = inDebugNoFetchFlag := True
def hasHazardOnBranch = if(earlyBranch) pipeline.service(classOf[HazardService]).hazardOnExecuteRS else False
override def setup(pipeline: VexRiscv): Unit = {
@ -147,6 +152,7 @@ class BranchPlugin(earlyBranch : Boolean,
val exceptionService = pipeline.service(classOf[ExceptionService])
branchExceptionPort = exceptionService.newExceptionPort(branchStage)
}
inDebugNoFetchFlag = False.setCompositeName(this, "inDebugNoFetchFlag")
}
override def build(pipeline: VexRiscv): Unit = {
@ -353,6 +359,7 @@ class BranchPlugin(earlyBranch : Boolean,
import branchStage._
val predictionMissmatch = fetchPrediction.cmd.hadBranch =/= input(BRANCH_DO) || (input(BRANCH_DO) && input(TARGET_MISSMATCH))
when(inDebugNoFetchFlag) { predictionMissmatch := input(BRANCH_DO)}
fetchPrediction.rsp.wasRight := ! predictionMissmatch
fetchPrediction.rsp.finalPc := input(BRANCH_CALC)
fetchPrediction.rsp.sourceLastWord := {

4
src/main/scala/vexriscv/plugin/DebugPlugin.scala
View File

@ -342,6 +342,10 @@ class DebugPlugin(var debugClockDomain : ClockDomain, hardwareBreakpointCount :
case p : PrivilegeService => p.forceMachine()
case _ =>
}
pipeline.plugins.foreach{
case p : PredictionInterface => p.inDebugNoFetch()
case _ =>
}
if(pipeline.things.contains(DEBUG_BYPASS_CACHE)) pipeline(DEBUG_BYPASS_CACHE) := True
}
when(allowEBreak) {