Hardware/VexRiscv
1
0
Fork 0
mirror of https://github.com/SpinalHDL/VexRiscv.git synced 2025-01-03 03:43:39 -05:00
Code Issues Projects Releases Packages Wiki Activity

regression : restore normal invalidation setup

Browse source
This commit is contained in:
Dolu1990 2020-04-10 18:58:03 +02:00
parent 4a9b8c1f72
commit abbfaf6bcf
1 changed files with 3 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/test/cpp/regression/main.cpp
View file

@ -2399,7 +2399,7 @@ public:
#ifdef DBUS_INVALIDATE #ifdef DBUS_INVALIDATE
if(ws->allowInvalidate){ if(ws->allowInvalidate){
if(VL_RANDOM_I(7) < 100){ if(VL_RANDOM_I(7) < 10){
invalidationHint.push(top->dBus_cmd_payload_address + VL_RANDOM_I(5)); invalidationHint.push(top->dBus_cmd_payload_address + VL_RANDOM_I(5));
} }
} }
@ -2434,8 +2434,8 @@ public:
#ifdef DBUS_INVALIDATE #ifdef DBUS_INVALIDATE
if(ws->allowInvalidate){ if(ws->allowInvalidate){
if(top->dBus_inv_cmd_ready) top->dBus_inv_cmd_valid = 0; if(top->dBus_inv_cmd_ready) top->dBus_inv_cmd_valid = 0;
if(top->dBus_inv_cmd_valid == 0 && VL_RANDOM_I(7) < 10){ if(top->dBus_inv_cmd_valid == 0 && VL_RANDOM_I(7) < 5){
top->dBus_inv_cmd_valid = invalidationHint.empty() == 0; top->dBus_inv_cmd_valid = 1;
if(!invalidationHint.empty()){ if(!invalidationHint.empty()){
top->dBus_inv_cmd_payload_address = invalidationHint.front(); top->dBus_inv_cmd_payload_address = invalidationHint.front();
invalidationHint.pop(); invalidationHint.pop();