Merge pull request #109 from sebastien-riou/arty
missing tcl files for Murax on Arty
This commit is contained in:
Dolu1990
GitHub
commit
ac79cc6fe6
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@ -0,0 +1,50 @@
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# Input files
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set mmi_file "./soc.mmi"
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set elf_file "./soc.elf"
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set source_bit_file "./soc.bit"
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# Output files
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set output_bit_file "./soc_latest_sw.bit"
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# Enable to turn on debug
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set updatemem_debug 0
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# Assemble bit file that can be downloaded to device directly
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# Combine the original bit file, mmi file, and software elf to create the full bitstream
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# Delete target file
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file delete -force $output_bit_file
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# Determine if the user has built the project and has the target source file
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# If not, then use the reference bit file shipped with the project
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if { ![file exists $source_bit_file] } {
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puts "\n********************************************"
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puts "INFO - File $source_bit_file doesn't exist as project has not been built"
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puts " Using $reference_bit_file instead\n"
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puts "********************************************/n"
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set source_bit_file $reference_bit_file
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}
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# Banner message to console as there is no output for a few seconds
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puts " Running updatemem ..."
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if { $updatemem_debug } {
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set error [catch {exec updatemem --debug --force --meminfo $mmi_file --data $elf_file --bit $source_bit_file --proc dummy --out $output_bit_file} result]
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} else {
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set error [catch {exec updatemem --force --meminfo $mmi_file --data $elf_file --bit $source_bit_file --proc dummy --out $output_bit_file} result]
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}
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# Print the stdout from updatemem
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puts $result
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# Updatemem returns 0 even when there is an error, so cannot trap on error. Having deleted output file to start, then
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# detect if it now exists, else exit.
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if { ![file exists $output_bit_file] } {
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puts "ERROR - $output_bit_file not made"
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return -1
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} else {
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puts "\n********************************************"
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puts " $output_bit_file correctly generated"
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puts "********************************************\n"
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}
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@ -0,0 +1,31 @@
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# Input file
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set source_bit_file "./latest.bit"
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# Output file
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set output_mcs_file "./latest.mcs"
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# Delete target file
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file delete -force $output_mcs_file
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# Determine if the user has built the project and has the target source file
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# If not, then use the reference bit file shipped with the project
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if { ![file exists $source_bit_file] } {
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puts "\n********************************************"
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puts "INFO - File $source_bit_file doesn't exist as project has not been built\n"
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puts "********************************************/n"
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error
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}
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# Create MCS file for base board QSPI flash memory
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write_cfgmem -force -format MCS -size 16 -interface SPIx4 -loadbit " up 0 $source_bit_file" $output_mcs_file
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# Check MCS was correctly made
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if { ![file exists $output_mcs_file] } {
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puts "ERROR - $output_bit_file not made"
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return -1
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} else {
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puts "\n********************************************"
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puts " $output_mcs_file correctly generated"
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puts "********************************************\n"
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}
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@ -0,0 +1,6 @@
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source [file join [file dirname [file normalize [info script]]] vivado_params.tcl]
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open_project -read_only $outputdir/$projectName
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open_run impl_1
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source $base/soc_mmi.tcl
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puts "mmi files generated"
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#Create output directory and clear contents
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source [file join [file dirname [file normalize [info script]]] vivado_params.tcl]
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file mkdir $outputdir
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set files [glob -nocomplain "$outputdir/*"]
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if {[llength $files] != 0} {
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puts "deleting contents of $outputdir"
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file delete -force {*}[glob -directory $outputdir *]; # clear folder contents
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} else {
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puts "$outputdir is empty"
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}
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#Create project
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create_project -part $part $projectName $outputdir
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#add source files to Vivado project
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#add_files -fileset sim_1 ./path/to/testbench.vhd
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#add_files [glob ./path/to/sources/*.vhd]
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#add_files -fileset constrs_1 ./path/to/constraint/constraint.xdc
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#add_files [glob ./path/to/library/sources/*.vhd]
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#set_property -library userDefined [glob ./path/to/library/sources/*.vhd]
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add_files [glob $base/*.v]
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add_files [glob $topv]
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add_files -fileset constrs_1 $base/arty_a7.xdc
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#set top level module and update compile order
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set_property top toplevel [current_fileset]
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update_compile_order -fileset sources_1
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#update_compile_order -fileset sim_1
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#launch synthesis
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launch_runs synth_1
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wait_on_run synth_1
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#Run implementation and generate bitstream
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set_property STEPS.PHYS_OPT_DESIGN.IS_ENABLED true [get_runs impl_1]
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launch_runs impl_1 -to_step write_bitstream
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wait_on_run impl_1
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puts "Implementation done!"
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#reports generated by default
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#open_run impl_1
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#report_timing_summary -check_timing_verbose -report_unconstrained -file report_timing_summary.rpt
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#report_utilization -hierarchical -file report_utilization.rpt
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#TODO: add checks about timing, DRC, CDC such that the script give clear indication if design is OK or not
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@ -0,0 +1,4 @@
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source [file join [file dirname [file normalize [info script]]] vivado_params.tcl]
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open_project -read_only $outputdir/$projectName
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start_gui
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@ -0,0 +1,151 @@
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#script to update the init values of RAM without re-synthesis
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if {![info exists mmi_file]} {
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# Set MMI output file name
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set mmi_file "soc.mmi"
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}
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if {![info exists part]} {
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set part "xc7a35ticsg324-1L"
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}
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# Function to swap bits
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proc swap_bits { bit } {
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if { $bit > 23 } {return [expr {24 + (31 - $bit)}]}
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if { $bit > 15 } {return [expr {16 + (23 - $bit)}]}
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if { $bit > 7 } {return [expr {8 + (15 - $bit)}]}
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return [expr {7 - $bit}]
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}
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# If run from batch file, will need to open project, then open the run
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# open_run impl_1
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# Find all the RAMs, place in a list
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set rams [get_cells -hier -regexp {.*core/system_ram/.*} -filter {REF_NAME =~ RAMB36E1}]
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puts "[llength $rams] RAMs in total"
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foreach m $rams {puts $m}
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set mems [dict create]
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foreach m $rams {
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set numbers [regexp -all -inline -- {[0-9]+} $m]
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dict set mems $numbers $m
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}
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set keys [dict keys $mems]
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#set keys [lsort -integer $keys]
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set rams []
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foreach key $keys {
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set m [dict get $mems $key]
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puts "$key -> $m"
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lappend rams $m
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}
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puts "after sort:"
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foreach m $rams {puts $m}
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puts $rams
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if { [llength $rams] == 0 } {
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puts "Error - no memories found"
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return -1
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}
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if { [expr {[llength $rams] % 4}] != 0 } {
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puts "Error - Number of memories not divisible by 4"
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return -1
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}
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set size_bytes [expr {4096*[llength $rams]}]
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puts "Instruction memory size $size_bytes"
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# Currently only support memory sizes between 16kB, (one byte per mem), and 128kB, (one bit per mem)
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if { ($size_bytes < (4*4096)) || ($size_bytes > (32*4096)) } {
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puts "Error - Memory size of $size_bytes out of range"
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puts " Script only supports memory sizes between 16kB and 128kB"
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return -1
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}
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# Create and open target mmi file
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set fp [open $mmi_file {WRONLY CREAT TRUNC}]
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if { $fp == 0 } {
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puts "Error - Unable to open $mmi_file for writing"
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return -1
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}
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# Write the file header
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puts $fp "<?xml version=\"1.0\" encoding=\"UTF-8\"?>"
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puts $fp "<MemInfo Version=\"1\" Minor=\"15\">"
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puts $fp " <Processor Endianness=\"ignored\" InstPath=\"dummy\">"
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puts $fp " <AddressSpace Name=\"soc_side\" Begin=\"[expr {0x80000000}]\" End=\"[expr {0x80000000 + $size_bytes-1}]\">"
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puts $fp " <BusBlock>"
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# Calculate the expected number of bits per memory
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set mem_bits [expr {32/[llength $rams]}]
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puts "mem_bits = $mem_bits"
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set mem_info [dict create]
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set i 0
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foreach ram $rams {
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# Get the RAM location
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set loc_val [get_property LOC [get_cells $ram]]
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regexp -- {(RAMB36_)([0-9XY]+)} $loc_val full ram_name loc_xy
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set memi [dict create ram $ram loc $loc_xy]
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set numbers [regexp -all -inline -- {[0-9]+} $ram]
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if { [llength $numbers] == 2 } {
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dict lappend mem_info [lindex $numbers 0] $memi
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} else {
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dict lappend mem_info [expr $i/4] $memi
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}
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incr i
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}
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set sorted_mem_info [dict create]
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foreach {idx mems} $mem_info {
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foreach mem [lreverse $mems] {
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dict lappend sorted_mem_info $idx $mem
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}
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}
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foreach mems $sorted_mem_info {
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foreach mem $mems {
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puts $mem
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}
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}
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set lsb 0
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set memlen [ expr 4096*8 / $mem_bits ]
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foreach {idx mems} $sorted_mem_info {
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puts "idx=$idx"
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foreach mem $mems {
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puts "mem=$mem"
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set ram [dict get $mem ram]
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set loc [dict get $mem loc]
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set msb [expr $lsb+$mem_bits-1]
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set addr_start 0
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set addr_end [expr $memlen-1]
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puts "ram=$ram loc=$loc lsb=$lsb msb=$msb addr_start=$addr_start addr_end=$addr_end"
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puts $fp " <!-- $ram -->"
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puts $fp " <BitLane MemType=\"RAMB36\" Placement=\"$loc\">"
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puts $fp " <DataWidth MSB=\"$msb\" LSB=\"$lsb\"/>"
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puts $fp " <!--not used!--><AddressRange Begin=\"$addr_start\" End=\"$addr_end\"/>"
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puts $fp " <Parity ON=\"false\" NumBits=\"0\"/>"
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puts $fp " </BitLane>"
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set lsb [expr ($msb+1)%32]
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}
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}
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puts $fp " </BusBlock>"
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puts $fp " </AddressSpace>"
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puts $fp " </Processor>"
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puts $fp " <Config>"
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puts $fp " <Option Name=\"Part\" Val=\"$part\"/>"
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puts $fp " </Config>"
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puts $fp " <DRC>"
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puts $fp " <Rule Name=\"RDADDRCHANGE\" Val=\"false\"/>"
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puts $fp " </DRC>"
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puts $fp "</MemInfo>"
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close $fp
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@ -0,0 +1,5 @@
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set outputdir ./vivado_project
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set part "xc7a35ticsg324-1L"
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set base ".."
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set projectName "fpga"
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set topv "$base/../../../Murax.v"
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@ -0,0 +1,26 @@
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open_hw
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connect_hw_server
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open_hw_target
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current_hw_device [get_hw_devices xc7a35t_0]
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refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xc7a35t_0] 0]
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create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {s25fl128sxxxxxx0-spi-x1_x2_x4}] 0]
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set_property PROBES.FILE {} [get_hw_devices xc7a35t_0]
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set_property FULL_PROBES.FILE {} [get_hw_devices xc7a35t_0]
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refresh_hw_device [lindex [get_hw_devices xc7a35t_0] 0]
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set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.FILES [list "latest.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.PRM_FILE {} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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set_property PROGRAM.CHECKSUM 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices xc7a35t_0] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices xc7a35t_0] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices xc7a35t_0] 0]]; program_hw_devices [lindex [get_hw_devices xc7a35t_0] 0]; };
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program_hw_cfgmem -hw_cfgmem [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a35t_0] 0]]
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close_hw_target
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close_hw
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@ -0,0 +1,10 @@
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open_hw
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connect_hw_server
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open_hw_target
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current_hw_device [get_hw_devices xc7a35t_0]
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refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xc7a35t_0] 0]
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set_property PROBES.FILE {} [get_hw_devices xc7a35t_0]
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set_property FULL_PROBES.FILE {} [get_hw_devices xc7a35t_0]
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set_property PROGRAM.FILE {latest.bit} [get_hw_devices xc7a35t_0]
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program_hw_devices [get_hw_devices xc7a35t_0]
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disconnect_hw_server
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@ -33,5 +33,5 @@ clean-for-commit:
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rm -f *.d
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rm demo_rom.bin demo.bin crt_ram.bin
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clean: clean-tmp
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clean: clean-for-commit
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rm -f *.bin
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