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VexRiscv
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#60 user space reached 

/sbin/init: error while loading shared libraries: libm.so.6: cannot stat shared object: Error 38
This commit is contained in:
Dolu1990 2019-03-27 00:26:51 +01:00
parent 94fc2c3ecf
commit b69c474fa2
8 changed files with 485 additions and 688 deletions
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1
.gitignore vendored
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@ -40,6 +40,7 @@ obj_dir
*.yaml *.yaml
*.memTrace *.memTrace
*.regTrace *.regTrace
*.debugTrace
*.tcl *.tcl
*.o *.o
*.bin *.bin

910
src/main/c/emulator/build/emulator.asm
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File diff suppressed because it is too large Load Diff

179
src/main/c/emulator/build/emulator.hex
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@ -1,10 +1,10 @@
:0200000480007A :0200000480007A
:1000000017110000130181F3170500001305856B1C :1000000017110000130101001705000013054578C2
:10001000970500009385056B17060000130606720E :10001000970500009385C577170600001306867EB6
:1000200063FCC5008322050023A05500130545008D :1000200063FCC5008322050023A05500130545008D
:1000300093854500E3E8C5FE17050000130505702C :1000300093854500E3E8C5FE170500001305857CA0
:10004000970500009385856F6378B5002320050030 :10004000970500009385057C6378B50023200500A3
:1000500013054500E36CB5FEEF00005DEF00801274 :1000500013054500E36CB5FEEF00C069EF008012A8
:10006000970000009380400113050000B705008150 :10006000970000009380400113050000B705008150
:10007000730020306F0000006780000073110134AE :10007000730020306F0000006780000073110134AE
:1000800023200100232211002326310023284100D0 :1000800023200100232211002326310023284100D0
@ -25,14 +25,14 @@
:10017000832E4107032F8107832FC1077311013499 :10017000832E4107032F8107832FC1077311013499
:0401800073002030B8 :0401800073002030B8
:10018400B70700809387C70773905730B71700806D :10018400B70700809387C70773905730B71700806D
:10019400938787F3938707F873900734B7170000A2 :10019400938707F873900734B7170000938707888D
:1001A400938707887390073073504030B70700C0B7 :1001A4007390073073504030B70700C07390173412
:1001B40073901734B7B70000739027309307000289 :1001B400B7B70000938707107390273093070002A6
:1001C4007390373073503014678000001315250086 :1001C400739037307350301467800000B717008085
:1001D400B7170080938787F33305F500032505F8E7 :1001D400938707F8131525003305F500032505005B
:1001E4006780000013152500B7170080938787F3F5 :1001E40067800000B717008013152500938707F870
:1001F4003305F5002320B5F867800000130101FFE3 :1001F4003305F5002320B50067800000130101FFDB
:1002040023261100EF00803EF32730347390371417 :1002040023261100EF00404BF3273034739037144A
:10021400F327103473901714F327203473902714A2 :10021400F327103473901714F327203473902714A2
:10022400F3275010739017348320C1001301010188 :10022400F3275010739017348320C1001301010188
:1002340067800000F327303473903714F327203499 :1002340067800000F327303473903714F327203499
@ -46,75 +46,88 @@
:1002B400678000003707020073200730170700002B :1002B400678000003707020073200730170700002B
:1002C4001307870173101734930710002320B50018 :1002C4001307870173101734930710002320B50018
:1002D40093070000370702007330073013850700C7 :1002D40093070000370702007330073013850700C7
:1002E40067800000130101FD2326110223248102EB :1002E40067800000130101FE232E1100232C8100DE
:1002F4002322910223202103232E3101232C4101A7 :1002F400232A91002328210123263101F3272034C6
:10030400232A5101F327203463CE0700130720006A :1003040063CE0714130720006384E7049306900068
:10031400638EE70413079000638EE724EFF01FEE6B :100314006396D710B71700809387070083A647FC1E
:100324006F00000293F7F70F13077000639CE70256 :100324001306100003A587FA6386C61E6384E622BB
:100334009307000273A047149307000873B0473073 :10033400638E061E032481018320C10183244101AD
:100344008320C10203248102832441020329010280 :10034400032901018329C100130101026F00C03692
:100354008329C101032A8101832A41011301010375 :10035400F3241034F3250030732430341306F002F0
:1003640067800000EFF09FE96FF09FFDF3241034E5 :100364009376F4071357C4006386C6121306300746
:10037400732A0030732430341377F4079357C4007E :100374006396C60A137737006300F72493073000A7
:1003840013F677009306F002630AD700930630074A :10038400630CF7229309100063043703EF00C032B3
:10039400630AD712EFF09FE66FF09FFA93072000ED :10039400F327303473903714F32710347390171401
:1003A400631EF6101359B4011355F4001375F501C7 :1003A400F327203473902714F327501073901734D5
:1003B400EFF0DFE1930A0500135544011375F501CD :1003B400B717000013574401938617C06308D72E5C
:1003C400EFF0DFE093090500135474001374F40193 :1003C400938717C86310F72CEF00803013090500DA
:1003D4009305C10013850A00EFF09FEA631205023A :1003D40063840902EF00402EF327303473903714FE
:1003E4009307C00163E0270D13192900B7070080A4 :1003E400F327103473901714F327203473902714D1
:1003F4009387076C3309F900832709006780070096 :1003F400F32750107390173413545400B717008028
:1004040093050A0013850400EFF0DFE26FF05FF359 :100404001374C407938707F83304F40023202401EA
:100414008327C100B389F9008325C10013050400B3 :1004140093844400739014346F008002EF00C02969
:10042400EFF05FDC9385090013850A00EFF09FE885 :10042400F327303473903714F32710347390171470
:10043400631E050693844400739014346FF05FF0D8 :10043400F327203473902714F32750107390173444
:100444008327C100B3C9F9006FF01FFD8327C100E2 :100444008320C10103248101832441010329010183
:10045400B3F9F9006FF05FFC8327C100B3E9F90039 :100454008329C100130101026780000093F7F70F9D
:100464006FF09FFB8327C100E3D837FB9389070014 :1004640013077000E39CE7FA9307000273A0471494
:100474006FF09FFA8327C100E3D0F9FA938907004C :100474009307000873B047308320C101032481012E
:100484006FF09FF98327C100E3F837F993890700D8 :1004840083244101032901018329C10013010102CD
:100494006FF09FF88327C100E3F0F9F89389070010 :100494006780000013777700E312F7F81357D4004E
:1004A4006FF09FF7EFF09FD56FF09FE993050A0077 :1004A40093572401B7160080938606F81377C7077D
:1004B40013850400EFF01FD86FF09FE8EFF01FD40E :1004B40093F7C7073307D700B387D700032707008D
:1004C4006FF01FE893F73700130710006382E70605 :1004C40003A6070037050200732005301705000056
:1004D400638C070213072000638CE70213073000C4 :1004D40013058501731015349307100003280700D2
:1004E4006380E70413574401B7170000938717C0CC :1004E4009307000037050200733005306390070856
:1004F4006304F704B7170000938717C86302F7066D :1004F4009357B4011305C001E362F5F23705008098
:10050400EFF0DFCF6F00C003EFF05FCF6FF09FFD20 :10050400939727001305C578B387A70083A707002F
:100514009359F40093F9F901B33930016FF09FFC5A :10051400678007001375F50FEF00801AF327103476
:100524009359F40093F9F901B33930016FF09FFB4B :1005240093874700739017346FF09FF183A5C7FA40
:10053400930910006FF01FFBEF00400C1309050036 :10053400EF00801A9307000873A047309307000266
:100544006396090213557400930509001375F501A8 :1005440073B04714F327103493874700739017341C
:10055400EFF05FC993844400739014346FF05FDE4E :100554006FF01FEF1307F0FF23A4E7FAF32710341B
:10056400EF00400A130905006FF09FFDEFF01FC96B :1005640093874700739017346FF09FEDF32730346F
:100574006FF05FFD13051001EFF05FC51304050074 :1005740073903714F3272034739027147390141452
:100584001305A000EFF09FC4930405001305B00009 :10058400F3275010739017349307001073B00710BB
:10059400EFF0DFC363020402930710006314F40452 :1005940093D5350093F5051073A00510B727000017
:1005A40013F5F40FEF000005F32710349387470089 :1005A4009387078073B00730B787000093870708E5
:1005B400739017346FF0DFD893050500138504009A :1005B40073A007306FF0DFE89359F40093F9F90161
:1005C400EF00C0049307000873A0473093070002AC :1005C400B33930016FF0DFDE3306060113545400F3
:1005D40073B04714F327103493874700739017348C :1005D4001374C407B306D40023A00601B7060200AF
:1005E4006FF01FD6EF0080006FF09FD5232E00FE22 :1005E40073A0063097060000938686017390163434
:1005F40067800000232CA0FE67800000032500FE16 :1005F400930710002320C70093070000B7060200EA
:1006040067800000032540FE678000009307C0FE5A :1006040073B00630E38607E0F32730347390371471
:100614001307F0FF23A0E7002324A0FE23A0B700C4 :10061400F32720347390271473901414F327501085
:1006240067800000130101FF23248100232291002D :10062400739017349307001073B0071093D73500F5
:10063400170400001304C4089704000093844408BA :1006340093F7071073A007106FF05FF6E37806F9DD
:10064400B3848440232021012326110093D4244021 :10064400130608006FF09FF8336606016FF01FF879
:1006540013090000631099041704000013044406EE :10065400334606016FF09FF7E37AC8F613060800E5
:10066400970400009384C405B3848440EFF09FA0F2 :100664006FF0DFF6E35406F7130608006FF01FF689
:1006740093D4244013090000631899028320C10015 :10067400E35EC8F4130608006FF05FF533760601F5
:100684000324810083244100032901001301010193 :100684006FF0DFF4EF004003F32730347390371436
:100694006780000083270400130919001304440031 :10069400F327103473901714F3272034739027141E
:1006A400E78007006FF01FFB83270400130919007C :1006A400F3275010739017346FF09FD2EF00C001FE
:0C06B40013044400E78007006FF01FFCF7 :1006B400130905006FF0DFD1232E00FE67800000D0
:1006C000140400801C040080A8040080A80400809A :1006C400232CA0FE67800000032500FE6780000045
:1006D00044040080A8040080A8040080A8040080CE :1006D400032540FE678000009307C0FE1307F0FF68
:1006E0005C040080A8040080A8040080A8040080A6 :1006E40023A0E7002324A0FE23A0B7006780000016
:1006F00050040080A8040080A8040080A8040080A2 :1006F400130101FF23248100232291001704000029
:1007000068040080A8040080A8040080A804008079 :100704001304C4089704000093844408B384844009
:1007100078040080A8040080A8040080A804008059 :10071400232021012326110093D42440130900002F
:1007200088040080A8040080A8040080A804008039 :10072400631099041704000013044406970400009E
:080730009804008000000000A5 :100734009384C405B3848440EFF0DF9393D42440BE
:1007440013090000631899028320C1000324810067
:100754008324410003290100130101016780000083
:10076400832704001309190013044400E7800700D9
:100774006FF01FFB832704001309190013044400BE
:08078400E78007006FF01FFC85
:10078C00CC050080D005008020040080200400806F
:10079C005406008020040080200400802004008087
:1007AC004C0600802004008020040080200400807F
:1007BC00800600802004008020040080200400803B
:1007CC007406008020040080200400802004008037
:1007DC006806008020040080200400802004008033
:1007EC005C0600802004008020040080200400802F
:0407FC004006008033
:040000058000000077 :040000058000000077
:00000001FF :00000001FF

2
src/main/c/emulator/makefile
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@ -1,5 +1,5 @@
PROJ_NAME=emulator PROJ_NAME=emulator
DEBUG=yes DEBUG=no
MULDIV=no MULDIV=no
COMPRESSED=no COMPRESSED=no
STANDALONE = .. STANDALONE = ..

6
src/main/c/emulator/src/main.c
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@ -14,7 +14,7 @@ void init() {
csr_write(mstatus, 0x0800 | MSTATUS_MPIE); csr_write(mstatus, 0x0800 | MSTATUS_MPIE);
csr_write(mie, 0); csr_write(mie, 0);
csr_write(mepc, OS_CALL); csr_write(mepc, OS_CALL);
csr_write(medeleg, MEDELEG_INSTRUCTION_PAGE_FAULT | MEDELEG_LOAD_PAGE_FAULT | MEDELEG_STORE_PAGE_FAULT); csr_write(medeleg, MEDELEG_INSTRUCTION_PAGE_FAULT | MEDELEG_LOAD_PAGE_FAULT | MEDELEG_STORE_PAGE_FAULT | MEDELEG_USER_ENVIRONNEMENT_CALL);
csr_write(mideleg, MIDELEG_SUPERVISOR_TIMER); csr_write(mideleg, MIDELEG_SUPERVISOR_TIMER);
csr_write(sbadaddr, 0); //Used to avoid simulation missmatch csr_write(sbadaddr, 0); //Used to avoid simulation missmatch
} }
@ -212,6 +212,10 @@ void trap(){
putC(a0); putC(a0);
csr_write(mepc, csr_read(mepc) + 4); csr_write(mepc, csr_read(mepc) + 4);
}break; }break;
case SBI_CONSOLE_GETCHAR:{
writeRegister(10, -1); //no char
csr_write(mepc, csr_read(mepc) + 4);
}break;
case SBI_SET_TIMER:{ case SBI_SET_TIMER:{
setMachineTimerCmp(a0, a1); setMachineTimerCmp(a0, a1);
csr_set(mie, MIE_MTIE); csr_set(mie, MIE_MTIE);

1
src/main/c/emulator/src/riscv.h
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@ -8,6 +8,7 @@
#define MEDELEG_INSTRUCTION_PAGE_FAULT (1 << 12) #define MEDELEG_INSTRUCTION_PAGE_FAULT (1 << 12)
#define MEDELEG_LOAD_PAGE_FAULT (1 << 13) #define MEDELEG_LOAD_PAGE_FAULT (1 << 13)
#define MEDELEG_STORE_PAGE_FAULT (1 << 15) #define MEDELEG_STORE_PAGE_FAULT (1 << 15)
#define MEDELEG_USER_ENVIRONNEMENT_CALL (1 << 8)
#define MIDELEG_SUPERVISOR_TIMER (1 << 5) #define MIDELEG_SUPERVISOR_TIMER (1 << 5)
#define MIE_MTIE (1 << 7) #define MIE_MTIE (1 << 7)

4
src/main/scala/vexriscv/demo/Linux.scala
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@ -40,7 +40,7 @@ make run DBUS=SIMPLE IBUS=SIMPLE DHRYSTONE=yes SUPERVISOR=yes CSR=yes COMPRESSED
Run linux => Run linux =>
sbt "runMain vexriscv.demo.LinuxGen" sbt "runMain vexriscv.demo.LinuxGen"
cd src/test/cpp/regression cd src/test/cpp/regression
make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/linuxDave/vmlinux.bin DTB=/home/spinalvm/hdl/linuxDave/vmlinux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=no make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099
@ -51,7 +51,7 @@ riscv64-unknown-elf-objdump -S -d vmlinux > vmlinux.asm; split -b 1M vmlinux.asm
split -b 1M vmlinux.asm split -b 1M vmlinux.asm
dtc -O dtb -o rv32.dtb rv32.dts dtc -O dtb -o rv32.dtb rv32.dts
make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes FLOW_INFO=yes TRACE_START=0000000 make run DBUS=SIMPLE IBUS=SIMPLE SUPERVISOR=yes CSR=yes COMPRESSED=yes REDO=0 DHRYSTONE=no LITEX=yes EMULATOR=/home/spinalvm/hdl/VexRiscv/src/main/c/emulator/build/emulator.bin VMLINUX=/home/spinalvm/hdl/riscv-linux/vmlinux.bin DTB=/home/spinalvm/hdl/riscv-linux/rv32.dtb RAMDISK=/home/spinalvm/hdl/linuxDave/initramdisk_dave TRACE=yes0 FLOW_INFO=yes TRACE_START=9570000099
*/ */

70
src/test/cpp/regression/main.cpp
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@ -835,7 +835,7 @@ public:
pcWrite(sepc); pcWrite(sepc);
}break; }break;
case 0x00000073:{ //ECALL case 0x00000073:{ //ECALL
trap(0, 8+privilege); trap(0, 8+privilege, 0x00000073); //To follow the VexRiscv area saving implementation
}break; }break;
case 0x10500073:{ //WFI case 0x10500073:{ //WFI
pcWrite(pc + 4); pcWrite(pc + 4);
@ -897,10 +897,10 @@ public:
if(v2p(address, &pAddr, WRITE)){ trap(0, 15, address); return; } if(v2p(address, &pAddr, WRITE)){ trap(0, 15, address); return; }
bool hit = false; bool hit = false;
for(int i = 0;i < RESERVED_ENTRY_COUNT;i++) hit |= reservedEntries[i].valid && reservedEntries[i].address == address; for(int i = 0;i < RESERVED_ENTRY_COUNT;i++) hit |= reservedEntries[i].valid && reservedEntries[i].address == address;
rfWrite(rd32, !hit);
if(hit){ if(hit){
dWrite(pAddr, 4, i32_rs2); dWrite(pAddr, 4, i32_rs2);
} }
rfWrite(rd32, !hit);
pcWrite(pc + 4); pcWrite(pc + 4);
} }
} break; } break;
@ -1063,6 +1063,7 @@ public:
ofstream regTraces; ofstream regTraces;
ofstream memTraces; ofstream memTraces;
ofstream logTraces; ofstream logTraces;
ofstream debugLog;
struct timespec start_time; struct timespec start_time;
@ -1125,6 +1126,9 @@ public:
if(ws->isPerifRegion(address)){ if(ws->isPerifRegion(address)){
MemRead t = periphRead.front(); MemRead t = periphRead.front();
if(t.address != address || t.size != size){ if(t.address != address || t.size != size){
cout << "DRead missmatch" << hex << endl;
cout << " REF : address=" << address << " size=" << size << endl;
cout << " DUT : address=" << t.address << " size=" << t.size << endl;
fail(); fail();
} }
*data = t.data; *data = t.data;
@ -1138,14 +1142,24 @@ public:
virtual void dWrite(int32_t address, int32_t size, uint32_t data){ virtual void dWrite(int32_t address, int32_t size, uint32_t data){
if(address & (size-1) != 0) if(address & (size-1) != 0)
cout << "Ref did a unaligned write" << endl; cout << "Ref did a unaligned write" << endl;
if(ws->isPerifRegion(address)){
if(!ws->isPerifRegion(address)){
mem.write(address, size, (uint8_t*)&data);
}
if(ws->isDBusCheckedRegion(address)){
MemWrite w; MemWrite w;
w.address = address; w.address = address;
w.size = size; w.size = size;
w.data = data; switch(size){
case 1: w.data = data & 0xFF; break;
case 2: w.data = data & 0xFFFF; break;
case 4: w.data = data; break;
}
periphWritesGolden.push(w); periphWritesGolden.push(w);
}else { if(periphWritesGolden.size() > 10){
mem.write(address, size, (uint8_t*)&data); cout << "??? periphWritesGolden" << endl;
fail();
}
} }
} }
@ -1193,6 +1207,7 @@ public:
memTraces.open (name + ".memTrace");hh memTraces.open (name + ".memTrace");hh
#endif #endif
logTraces.open (name + ".logTrace"); logTraces.open (name + ".logTrace");
debugLog.open (name + ".debugTrace");
fillSimELements(); fillSimELements();
clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &start_time); clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &start_time);
} }
@ -1254,22 +1269,7 @@ public:
virtual bool isDBusCheckedRegion(uint32_t address){ return isPerifRegion(address);} virtual bool isDBusCheckedRegion(uint32_t address){ return isPerifRegion(address);}
virtual void dBusAccess(uint32_t addr,bool wr, uint32_t size,uint32_t mask, uint32_t *data, bool *error) { virtual void dBusAccess(uint32_t addr,bool wr, uint32_t size,uint32_t mask, uint32_t *data, bool *error) {
assertEq(addr % (1 << size), 0); assertEq(addr % (1 << size), 0);
if(isPerifRegion(addr)){ if(!isPerifRegion(addr)) {
if(wr){
CpuRef::MemWrite w;
w.address = addr;
w.size = 1 << size;
w.data = *data;
riscvRef.periphWrites.push(w);
} else {
CpuRef::MemRead r;
r.address = addr;
r.size = 1 << size;
r.data = *data;
r.error = *error;
riscvRef.periphRead.push(r);
}
} else {
if(wr){ if(wr){
memTraces << memTraces <<
#ifdef TRACE_WITH_TIME #ifdef TRACE_WITH_TIME
@ -1305,6 +1305,30 @@ public:
} }
} }
if(wr){
if(isDBusCheckedRegion(addr)){
CpuRef::MemWrite w;
w.address = addr;
w.size = 1 << size;
switch(size){
case 0: w.data = *data & 0xFF; break;
case 1: w.data = *data & 0xFFFF; break;
case 2: w.data = *data ; break;
}
riscvRef.periphWrites.push(w);
}
} else {
if(isPerifRegion(addr)){
CpuRef::MemRead r;
r.address = addr;
r.size = 1 << size;
r.data = *data;
r.error = *error;
riscvRef.periphRead.push(r);
}
}
} }
// void periphAccess(uint32_t addr,bool wr, uint32_t size,uint32_t mask, uint32_t *data, bool *error){ // void periphAccess(uint32_t addr,bool wr, uint32_t size,uint32_t mask, uint32_t *data, bool *error){
@ -2946,7 +2970,7 @@ public:
LitexSoC(string name) : Workspace(name) { LitexSoC(string name) : Workspace(name) {
} }
virtual bool isDBusCheckedRegion(uint32_t address){ return true;}
virtual bool isPerifRegion(uint32_t addr) { return (addr & 0xF0000000) == 0xB0000000 || (addr & 0xE0000000) == 0xE0000000;} virtual bool isPerifRegion(uint32_t addr) { return (addr & 0xF0000000) == 0xB0000000 || (addr & 0xE0000000) == 0xE0000000;}
virtual bool isMmuRegion(uint32_t addr) { return (addr & 0xFF000000) != 0x81000000;} virtual bool isMmuRegion(uint32_t addr) { return (addr & 0xFF000000) != 0x81000000;}