fpu zero/nan wip

src/main/scala/vexriscv/ip/fpu/FpuCore.scala

@@ -628,12 +628,20 @@ case class FpuCore( portCount : Int, p : FpuParameter) extends Component{
     val norm = new Area{
       def xyExponent = math.xyExponent
       def xyMantissa = math.xyMantissa
-      def xySign = math.xySign
+      val xySign = CombInit(math.xySign)
 
       val shiftOh = OHMasking.first(xyMantissa.asBools.reverse)
       val shift = OHToUInt(shiftOh)
       val mantissa = (xyMantissa |<< shift) >> 1
       val exponent = xyExponent - shift + 1
+      val forceZero = xyMantissa === 0
+      val forceOverflow = exponent === exponent.maxValue
+      val forceNan =
+//      val
+      when(forceZero){ //TODO
+        exponent := 0
+        xySign := False
+      }
     }
 
 

src/test/scala/vexriscv/ip/fpu/FpuTest.scala

@@ -304,6 +304,7 @@ class FpuTest extends FunSuite{
           }
         }
         def checkFloat(ref : Float, dut : Float): Boolean ={
+          if(ref === dut) return  true
           ref.abs * 1.0001 > dut.abs && ref.abs * 0.9999 < dut.abs && ref.signum == dut.signum
         }
 
@@ -491,6 +492,13 @@ class FpuTest extends FunSuite{
         val b2f = lang.Float.intBitsToFloat(_)
 
 
+        testAdd(1.2f, -1.2f)
+        testAdd(-1.2f, 1.2f)
+        testAdd(0.0f, -1.2f)
+        testAdd(-0.0f, -1.2f)
+        testAdd(1.2f, -0f)
+        testAdd(1.2f, 0f)
+
         testFmv_x_w(1.246f)
         testFmv_w_x(lang.Float.floatToIntBits(7.234f))
 

src/test/scala/vexriscv/ip/fpu/Playground.scala

@@ -35,3 +35,11 @@ object MiaouSqrt extends App{
   println(output)
   println(s"ref ${Math.sqrt(input)}")
 }
+
+
+object MiaouNan extends App{
+  println(Float.NaN + 3.0f)
+  println(3.0f + Float.NaN )
+  println(0.0f*Float.PositiveInfinity )
+  println(1.0f/0.0f )
+}