Hardware
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VexRiscv
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Better readme

This commit is contained in:
Charles Papon 2017-03-26 22:43:00 +02:00
parent 70e8bc503e
commit e5148e5e05
1 changed files with 6 additions and 4 deletions
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@ -30,8 +30,7 @@ object ALU_RESULT extends Stageable(UInt(32 bits))
class AluPlugin() extends Plugin[VexRiscv]{ class AluPlugin() extends Plugin[VexRiscv]{
//Callback to setup the plugin and ask for different services
override def setup(pipeline: VexRiscv): Unit = { override def setup(pipeline: VexRiscv): Unit = {
import pipeline.config._ import pipeline.config._
//Do some setups as for example specifying some instruction decoding by using the Decoding service //Do some setups as for example specifying some instruction decoding by using the Decoding service
@ -39,10 +38,13 @@ class AluPlugin() extends Plugin[VexRiscv]{
decoderService.addDefault(ALU_ENABLE,False) decoderService.addDefault(ALU_ENABLE,False)
decodingService.add(List( decodingService.add(List(
//..... M"0100----------" -> List(ALU_ENABLE -> True, ALU_OP -> B"01"),
M"0110---11-----" -> List(ALU_ENABLE -> True, ...)
)) ))
} }
//Callback to build the hardware logic
override def build(pipeline: VexRiscv): Unit = { override def build(pipeline: VexRiscv): Unit = {
import pipeline._ import pipeline._