Merge pull request #145 from cjearls/addingNexys4DDRtoPicoSoCSigned

adding support for the Nexys4DDR to PicoSoC example
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Karol Gugala 2021-05-18 15:22:36 +02:00 committed by GitHub
commit 043e59355f
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4 changed files with 140 additions and 0 deletions

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@ -23,6 +23,12 @@ else ifeq ($(TARGET),arty_100)
PCF:=${current_dir}/arty.pcf
DEVICE := xc7a100t_test
BOARD_BUILDDIR := ${BUILDDIR}/arty_100
else ifeq ($(TARGET),nexys4ddr)
VERILOG += ${current_dir}/nexys4ddr.v
PARTNAME := xc7a100tcsg324-1
PCF:=${current_dir}/nexys4ddr.pcf
DEVICE := xc7a100t_test
BOARD_BUILDDIR := ${BUILDDIR}/nexys4ddr
else
VERILOG += ${current_dir}/basys3.v
PARTNAME := xc7a35tcpg236-1

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@ -16,6 +16,12 @@ picosoc example, run the following commands:
TARGET="arty_100" make -C picosoc_demo
.. code-block:: bash
:name: example-picosoc-nexys4ddr-group
TARGET="nexys4ddr" make -C picosoc_demo
.. code-block:: bash
:name: example-picosoc-basys3-group

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@ -0,0 +1,42 @@
# 100 MHz CLK
set_io clk E3
# UART rx and tx are assigned to pins 1 and 2 of the PMOD Jumper C
set_io rx C4
set_io tx D4
# LEDs
set_io led[0] H17
set_io led[1] K15
set_io led[2] J13
set_io led[3] N14
set_io led[4] R18
set_io led[5] V17
set_io led[6] U17
set_io led[7] U16
set_io led[8] V16
set_io led[9] T15
set_io led[10] U14
set_io led[11] T16
set_io led[12] V15
set_io led[13] V14
set_io led[14] V12
set_io led[15] V11
# SWs
set_io sw[0] J15
set_io sw[1] L16
set_io sw[2] M13
set_io sw[3] R15
set_io sw[4] R17
set_io sw[5] T18
set_io sw[6] U18
set_io sw[7] R13
set_io sw[8] T8
set_io sw[9] U8
set_io sw[10] R16
set_io sw[11] T13
set_io sw[12] H6
set_io sw[13] U12
set_io sw[14] U11
set_io sw[15] V10

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@ -0,0 +1,86 @@
/*
* PicoSoC - A simple example SoC using PicoRV32
*
* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
module top (
input clk,
output tx,
input rx,
input [15:0] sw,
output [15:0] led,
);
wire clk_bufg;
BUFG bufg (.I(clk), .O(clk_bufg));
reg [5:0] reset_cnt = 0;
wire resetn = &reset_cnt;
always @(posedge clk_bufg) begin
reset_cnt <= reset_cnt + !resetn;
end
wire iomem_valid;
reg iomem_ready;
wire [3:0] iomem_wstrb;
wire [31:0] iomem_addr;
wire [31:0] iomem_wdata;
reg [31:0] iomem_rdata;
reg [31:0] gpio;
assign led = gpio[15:0];
always @(posedge clk_bufg) begin
if (!resetn) begin
gpio <= 0;
end else begin
iomem_ready <= 0;
if (iomem_valid && !iomem_ready && iomem_addr[31:24] == 8'h 03) begin
iomem_ready <= 1;
iomem_rdata <= {sw, gpio[15:0]};
if (iomem_wstrb[0]) gpio[ 7: 0] <= iomem_wdata[ 7: 0];
if (iomem_wstrb[1]) gpio[15: 8] <= iomem_wdata[15: 8];
if (iomem_wstrb[2]) gpio[23:16] <= iomem_wdata[23:16];
if (iomem_wstrb[3]) gpio[31:24] <= iomem_wdata[31:24];
end
end
end
picosoc_noflash soc (
.clk (clk_bufg),
.resetn (resetn ),
.ser_tx (tx),
.ser_rx (rx),
.irq_5 (1'b0 ),
.irq_6 (1'b0 ),
.irq_7 (1'b0 ),
.iomem_valid (iomem_valid ),
.iomem_ready (iomem_ready ),
.iomem_wstrb (iomem_wstrb ),
.iomem_addr (iomem_addr ),
.iomem_wdata (iomem_wdata ),
.iomem_rdata (iomem_rdata )
);
endmodule