added code links and fixed minor errors
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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Joshua Fife
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@ -1,5 +1,6 @@
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Customizing the Makefiles from Symbiflow-examples
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=======================================================================
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===================================================
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A key step in creating your own designs is understanding how to generate your own Makefiles to
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properly compile and build designs with the symbiflow toolchain. This tutorial walks you through
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some of the key aspects of working with Makefiles and explains how you can create Makefiles for
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@ -14,12 +15,12 @@ Example
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-------
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Every design in symbiflow has its own Makefile. For example
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`Counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_,
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`counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_,
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`Linux Litex Demo <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/linux_litex_demo/Makefile>`_,
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and `Picosoc Demo <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/picosoc_demo/Makefile>`_
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and `PicoSoC Demo <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/picosoc_demo/Makefile>`_
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all have there own unique Makefiles for compiling and building respective designs. To understand
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how to set up a Makefile in symbiflow, lets take a look at a simple Makefile. The following code
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is based off of the Makefile within `Counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_
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how to set up a Makefile in Symbiflow, lets take a look at a simple Makefile. The following code
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is based on the Makefile within the `counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_
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and has been modified slightly for simplicity. Highlighted lines within the code below are of
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particular interest and will change depending on your specific design elements and hardware.
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Lines that are not highlighted do not change from design to design and can be copy and pasted
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@ -31,7 +32,7 @@ into your own Makefile.
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:linenos:
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mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
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current_dir := $(patsubst %/,%,$(dir $(mkfile_path)))
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current_dir := $(patsubst %/,%,$(dir $(mkfile_path)))
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TOP:=top
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VERILOG:=${current_dir}/counter.v
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DEVICE := xc7a50t_test
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@ -75,11 +76,11 @@ into your own Makefile.
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Adding HDL files to your design
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--------------------------------
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Line 3 in the Makefile shows how to define the name for your top level module. For example if
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:ref:`Line 3 <makefile-example>` in the Makefile shows how to define the name for your top level module. For example if
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your top level module was named ``module switches ( ...`` then you would simply change line 3 to
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``TOP:=switches``.
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Line 4 in the Makefile shows how to add HDL files to the design. The general syntax is:
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:ref:`Line 4 <makefile-example>` in the Makefile shows how to add HDL files to the design. The general syntax is:
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``<HDL language>:=${current_dir}/<your HDL file path>``. You can also add multiple HDL files to a
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design using the following syntax:
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@ -117,7 +118,7 @@ Makefile to ``SYSTEM_VERILOG`` to improve readability.
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Setting the Board Type and Part Name
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-------------------------------------
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Line 5 in the example Makefile defines the device fabric for the board being used in the project.
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:ref:`Line 5 <makefile-example>` in the example Makefile defines the device fabric for the board being used in the project.
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Several different device fabrics are supported and a listing of the commands for each
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follow:
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@ -167,10 +168,10 @@ follow:
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DEVICE:= xc7a200t_test
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Line 7 defines the family for your FPGA. For example basys3 and arty boards are from the artix7
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:ref:`Line 7 <makefile-example>` defines the family for your FPGA. For example basys3 and arty boards are from the artix7
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family while zybo boards are from the zynq7 series.
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As shown on line 9 of the example Makefile, you will also need to define the specific FPGA part
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As shown on :ref:`line 9 <makefile-example>` of the example Makefile, you will also need to define the specific FPGA part
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number for your chip. To do this you need to add the following line of code to your Makefile
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depending on your hardware:
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@ -222,7 +223,7 @@ depending on your hardware:
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Constraint files
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----------------
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Line 10 shows how you can specify what the constraint files are being used for your design. The
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:ref:`Line 10 <makefile-example>` shows how you can specify what the constraint files are being used for your design. The
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general syntax depends on whether you are using XDC files or a SDC+PCF pair:
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.. tabs::
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@ -240,8 +241,8 @@ general syntax depends on whether you are using XDC files or a SDC+PCF pair:
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PCF := ${current_dir}/<name of PCF file>
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SDC := ${current_dir}/<name of SDC file>
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Note that the lines 22, 25, 28, and 31 (.eblif, net, place, and route) will also need to change
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depending on if you use an XDC file or some combination of SDC, PCF and XDC files. The following
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Note that the :ref:`lines 22, 25, 28, and 31 <makefile-example>` (.eblif, net, place, and route) will also need to change
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depending on if you use an XDC file or some combination of SDC and PCF files. The following
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snippets show the differences and the areas that will need to change:
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.. tabs::
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@ -249,6 +250,7 @@ snippets show the differences and the areas that will need to change:
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.. group-tab:: XDC
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.. code-block:: bash
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:lineno-start: 21
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:emphasize-lines: 2
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${BOARD_BUILDDIR}/${TOP}.eblif: | ${BOARD_BUILDDIR}
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@ -266,6 +268,7 @@ snippets show the differences and the areas that will need to change:
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.. group-tab:: SDC+PCF
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.. code-block:: bash
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:lineno-start: 21
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:emphasize-lines: 5, 8, 11
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${BOARD_BUILDDIR}/${TOP}.eblif: | ${BOARD_BUILDDIR}
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@ -281,24 +284,8 @@ snippets show the differences and the areas that will need to change:
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cd ${BOARD_BUILDDIR} && symbiflow_route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
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.. group-tab:: SDC+PCF+XDC
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.. code-block:: bash
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:emphasize-lines: 2, 5, 8, 11
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${BOARD_BUILDDIR}/${TOP}.eblif: | ${BOARD_BUILDDIR}
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cd ${BOARD_BUILDDIR} && symbiflow_synth -t ${TOP} -v ${VERILOG} -d ${BITSTREAM_DEVICE} -p ${PARTNAME} -x ${XDC} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.net: ${BOARD_BUILDDIR}/${TOP}.eblif
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cd ${BOARD_BUILDDIR} && symbiflow_pack -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.place: ${BOARD_BUILDDIR}/${TOP}.net
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cd ${BOARD_BUILDDIR} && symbiflow_place -e ${TOP}.eblif -d ${DEVICE} -p ${PCF} -n ${TOP}.net -P ${PARTNAME} -s ${SDC} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.route: ${BOARD_BUILDDIR}/${TOP}.place
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cd ${BOARD_BUILDDIR} && symbiflow_route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
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Lines 33-37 (running ``symbiflow_write_fasm`` and ``symbiflow_write_bitstream``) typically do
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:ref:`Lines 33-37 <makefile-example>` (running ``symbiflow_write_fasm`` and ``symbiflow_write_bitstream``) typically do
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not change within the Makefile from design to design.
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A Note on the example designs use of ifeq/else ifeq blocks
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@ -311,6 +298,7 @@ is from lines 9-39 of `the Makefile from Counter-test <https://github.com/SymbiF
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.. code-block:: bash
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:name: counter-test Makefile snippet
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:lineno-start: 9
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ifeq ($(TARGET),arty_35)
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PARTNAME := xc7a35tcsg324-1
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