All part 1 designs

Signed-off-by: Joshua Fife <jpfife17@gmail.com>
This commit is contained in:
Joshua Fife 2021-10-23 17:40:31 -06:00
parent 02d2a3021e
commit 3bf32d5532
8 changed files with 86 additions and 1 deletions

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@ -90,6 +90,15 @@ if [ "$fpga_family" = "xc7" ]; then
"hello-a") "hello-a")
snippets="${activate_env} projf-makefiles/hello/hello-arty/A/README.rst:hello-arty-a" snippets="${activate_env} projf-makefiles/hello/hello-arty/A/README.rst:hello-arty-a"
;; ;;
"hello-b")
snippets="${activate_env} projf-makefiles/hello/hello-arty/B/README.rst:hello-arty-B"
;;
"hello-c")
snippets="${activate_env} projf-makefiles/hello/hello-arty/C/README.rst:hello-arty-C"
;;
"hello-d")
snippets="${activate_env} projf-makefiles/hello/hello-arty/D/README.rst:hello-arty-D"
;;
*) *)
echo "ERROR: Unknown example name: $example" >&2 echo "ERROR: Unknown example name: $example" >&2
exit 1 exit 1

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@ -8,7 +8,10 @@ examples = [
"button_controller", "button_controller",
"pulse_width_led", "pulse_width_led",
"timer", "timer",
"hello-a" "hello-a",
"hello-b",
"hello-c",
"hello-d"
] ]
jobs = [] jobs = []

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@ -0,0 +1,8 @@
current_dir := ${CURDIR}
proj_f_dir := ${current_dir}/../../../../third_party/projf-explore/hello/hello-arty/B
TOP := top
SOURCES := ${proj_f_dir}/top.sv
XDC := ${proj_f_dir}/arty.xdc
include ${current_dir}/../../../../common/Makefile

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@ -0,0 +1,16 @@
Part 1 Design B
===============
This design allows you to turn four LEDs on and off with switches 0 and 1. Control LEDs 0 and 1 with switch 0 and LEDs
2 and 3 with switch 1. To build this design run the following in the root symbiflow-example directory:
.. code:: bash
:name: hello-arty-B
TARGET="arty_35" make -C projf-makefiles/hello/hello-arty/B"
You can then download the bitstream by running:
.. code:: bash
TARGET="arty_35" make download -C projf-makefiles/hello/hello-arty/B"

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@ -0,0 +1,8 @@
current_dir := ${CURDIR}
proj_f_dir := ${current_dir}/../../../../third_party/projf-explore/hello/hello-arty/C
TOP := top
SOURCES := ${proj_f_dir}/top.sv
XDC := ${proj_f_dir}/arty.xdc
include ${current_dir}/../../../../common/Makefile

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@ -0,0 +1,17 @@
Part 1 Design C
===============
This design has the same functionality in hardware as part C but demonstrates
the use of conditional operators in System Verilog. To build this design run the
following command in the main symbiflow directory:
.. code:: bash
:name: hello-arty-C
TARGET="arty_35" make -C projf-makefiles/hello/hello-arty/C"
You can then download the bitstream by running:
.. code:: bash
TARGET="arty_35" make download -C projf-makefiles/hello/hello-arty/C"

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@ -0,0 +1,8 @@
current_dir := ${CURDIR}
proj_f_dir := ${current_dir}/../../../../third_party/projf-explore/hello/hello-arty/D
TOP := top
SOURCES := ${proj_f_dir}/top.sv
XDC := ${proj_f_dir}/arty.xdc
include ${current_dir}/../../../../common/Makefile

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@ -0,0 +1,16 @@
Part 1 Design D
===============
This design is the fourth design from Part 1 of Hello Arty. To build this design run the following
command in the main symbiflow directory:
.. code:: bash
:name: hello-arty-D
TARGET="arty_35" make -C projf-makefiles/hello/hello-arty/D"
You can then download the bitstream by running:
.. code:: bash
TARGET="arty_35" make download -C projf-makefiles/hello/hello-arty/D"