Hardware
/
f4pga-examples
mirror of https://github.com/chipsalliance/f4pga-examples.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #307 from antmicro/umarcor/f4pga-install-dir 

docs: s/INSTALL_DIR/F4PGA_INSTALL_DIR/
This commit is contained in:
Tomasz Michalak 2022-05-31 11:48:27 +02:00 committed by GitHub
parent 28cc2db3ef 18f067bf61
commit be210fbebc
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 17 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
docs/building-examples.rst
View File

@ -9,7 +9,7 @@ set it to earlier, for example:
.. code-block:: bash
:name: export-install-dir
export INSTALL_DIR=~/opt/f4pga
export F4PGA_INSTALL_DIR=~/opt/f4pga
Select your FPGA family:
@ -31,7 +31,6 @@ Select your FPGA family:
Next, prepare the environment:
.. tabs::
.. group-tab:: Artix-7
@ -39,40 +38,16 @@ Next, prepare the environment:
.. code-block:: bash
:name: conda-prep-env-xc7
export PATH="$INSTALL_DIR/$FPGA_FAM/install/bin:$PATH";
source "$INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
export PATH="$F4PGA_INSTALL_DIR/$FPGA_FAM/install/bin:$PATH";
source "$F4PGA_INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
.. group-tab:: EOS S3
.. code-block:: bash
:name: conda-prep-env-eos-s3
export PATH="$INSTALL_DIR/$FPGA_FAM/quicklogic-arch-defs/bin:$PATH";
source "$INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
.. code-block:: bash
:name: f4pga-env-bin
export F4PGA_ENV_BIN="$INSTALL_DIR/$FPGA_FAM/conda/bin"
.. tabs::
.. group-tab:: AMD/Xilinx Series 7
.. code-block:: bash
:name: f4pga-env-share-xc7
export F4PGA_ENV_SHARE="$INSTALL_DIR/$FPGA_FAM/install/share/symbiflow"
.. group-tab:: EOS S3
.. code-block:: bash
:name: f4pga-env-share-ql
export F4PGA_ENV_SHARE="$INSTALL_DIR/$FPGA_FAM/share"
export PATH="$F4PGA_INSTALL_DIR/$FPGA_FAM/quicklogic-arch-defs/bin:$PATH";
source "$F4PGA_INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
Finally, enter your working Conda environment:

12
docs/getting.rst
View File

@ -84,7 +84,7 @@ and so you will need to add some ``sudo`` commands to the instructions below.
.. code-block:: bash
:name: conda-install-dir
export INSTALL_DIR=~/opt/f4pga
export F4PGA_INSTALL_DIR=~/opt/f4pga
Setup and download assets
~~~~~~~~~~~~~~~~~~~~~~~~~
@ -112,8 +112,8 @@ Next, setup Conda and your system's environment:
.. code-block:: bash
:name: conda-setup
bash conda_installer.sh -u -b -p $INSTALL_DIR/$FPGA_FAM/conda;
source "$INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh";
bash conda_installer.sh -u -b -p $F4PGA_INSTALL_DIR/$FPGA_FAM/conda;
source "$F4PGA_INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh";
conda env create -f $FPGA_FAM/environment.yml
Download architecture definitions:
@ -129,13 +129,13 @@ Download architecture definitions:
.. code-block:: bash
:name: download-arch-def-xc7
mkdir -p $INSTALL_DIR/xc7/install
mkdir -p $F4PGA_INSTALL_DIR/xc7/install
F4PGA_TIMESTAMP='20220523-230829'
F4PGA_HASH='934b12d'
for PKG in install xc7a50t_test xc7a100t_test xc7a200t_test xc7z010_test; do
wget -qO- https://storage.googleapis.com/symbiflow-arch-defs/artifacts/prod/foss-fpga-tools/symbiflow-arch-defs/continuous/install/${F4PGA_TIMESTAMP}/symbiflow-arch-defs-${PKG}-${F4PGA_HASH}.tar.xz | tar -xJC $INSTALL_DIR/${FPGA_FAM}/install
wget -qO- https://storage.googleapis.com/symbiflow-arch-defs/artifacts/prod/foss-fpga-tools/symbiflow-arch-defs/continuous/install/${F4PGA_TIMESTAMP}/symbiflow-arch-defs-${PKG}-${F4PGA_HASH}.tar.xz | tar -xJC $F4PGA_INSTALL_DIR/${FPGA_FAM}/install
done
.. group-tab:: EOS-S3
@ -143,7 +143,7 @@ Download architecture definitions:
.. code-block:: bash
:name: download-arch-def-eos-s3
wget -qO- https://storage.googleapis.com/symbiflow-arch-defs-install/quicklogic-arch-defs-d6d05185.tar.gz | tar -xzC $INSTALL_DIR/$FPGA_FAM/
wget -qO- https://storage.googleapis.com/symbiflow-arch-defs-install/quicklogic-arch-defs-d6d05185.tar.gz | tar -xzC $F4PGA_INSTALL_DIR/$FPGA_FAM/
If the above commands exited without errors, you have successfully installed and configured your working environment.

2
docs/personal-designs.rst
View File

@ -120,7 +120,7 @@ name you used for your top level module:
.. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
openocd -f ${F4PGA_INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
.. tip::

10
xc7/additional_examples/button_controller/README.rst
View File

@ -3,8 +3,8 @@ Button Controller
This example demonstrates using a button debouncer state machine to count the number of presses on the
center button of the basys3 board. The number of presses counted by the debouncer state machine will
be given on the two right most digits of the display. The two left most digits record the number of
presses counted without the debouncer. You can reset the button counter by pressing the up button on
be given on the two right most digits of the display. The two left most digits record the number of
presses counted without the debouncer. You can reset the button counter by pressing the up button on
the board. To build the design first navigate to the additional examples directory:
.. code-block:: bash
@ -12,7 +12,7 @@ the board. To build the design first navigate to the additional examples directo
cd additional_examples
Then run make to compile the design:
Then run make to compile the design:
.. code-block:: bash
:name: example-debouncer-basys3
@ -30,12 +30,10 @@ Now, you can upload the design with:
.. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
openocd -f ${F4PGA_INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
The following is an example of the debouncer in action:
.. image:: ../images/debounce.gif
:align: center
:width: 50%

2
xc7/litex_demo/README.rst
View File

@ -52,7 +52,7 @@ Now you can upload the design with:
.. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
openocd -f ${F4PGA_INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
.. note::