Changes rough draft

Signed-off-by: Joshua Fife <jpfife17@gmail.com>

docFeedback.md

@@ -2,9 +2,9 @@ I would add the following as issues but your repo doesn't allow that:
 
 # The Building your Designs Page
 
-- What to do to the Makefile if using SystemVerlog or not using XDL?  Need to tell how.
+- check What to do to the Makefile if using SystemVerlog or not using XDL?  Need to tell how.
 
-- Are there suggestions/restrictions on where your design files can be put?  If it doesn't matter, could still say so.
+- check Are there suggestions/restrictions on where your design files can be put?  If it doesn't matter, could still say so.
 
 - Add the programming of the board to the Makefile.  I assume it would be simple 1-liner.  I would add it but I have no way of testing it on my system.
 

docs/Understanding-Makefile.rst

@@ -4,7 +4,7 @@ A key step in creating your own designs is understanding how to use the Makefile
 
 Example 
 -------
-To understand how the Makefiles within Symbiflow are setup, lets take a look at a simple Makefile in symbiflow-examples that will run the symbiflow counter test on the basys3 board. Highlighted lines within the code below are of particular interest and will change depending on your design and hardware.
+Every design in symbiflow has its own makefile. For example Counter-test <add links>, Picosoc, and Litex exmples all have there own unique makefiles for building the respective designs. To understand how these Makefiles are setup, lets take a look at a simple Makefile. The following code is taken from the Makefile within Counter-test and has been modified for simplicity to compile the design for the Basys3 board. Highlighted lines within the code below are of particular interest and will change depending on your design and hardware.
 
 .. code-block:: bash
    :name: makefile-example
@@ -181,6 +181,47 @@ As shown on line 9 of the example makefile you will also need to define the spec
          PARTNAME:= xc7a200tsbg484-1
 
 
+A Note on some example designs use of ifeq, else ifeq blocks
+-------------------------------------------------------------
+
+If you take a look at many of the example designs within symbiflow you will find an ifeq else ifeq block. For example the following snipet is from lines 9-39 of the Makefile within Counter-test:
+.. code-block:: bash
+   :name: counter-test Makefile snippet
+
+   ifeq ($(TARGET),arty_35)
+   PARTNAME := xc7a35tcsg324-1
+   XDC:=${current_dir}/arty.xdc
+   BOARD_BUILDDIR := ${BUILDDIR}/arty_35
+   else ifeq ($(TARGET),arty_100)
+   PARTNAME:= xc7a100tcsg324-1
+   XDC:=${current_dir}/arty.xdc
+   DEVICE:= xc7a100t_test
+   BOARD_BUILDDIR := ${BUILDDIR}/arty_100
+   else ifeq ($(TARGET),nexys4ddr)
+   PARTNAME:= xc7a100tcsg324-1
+   XDC:=${current_dir}/nexys4ddr.xdc
+   DEVICE:= xc7a100t_test
+   BOARD_BUILDDIR := ${BUILDDIR}/nexys4ddr
+   else ifeq ($(TARGET),zybo)
+   PARTNAME:= xc7z010clg400-1
+   XDC:=${current_dir}/zybo.xdc
+   DEVICE:= xc7z010_test
+   BITSTREAM_DEVICE:= zynq7
+   BOARD_BUILDDIR := ${BUILDDIR}/zybo
+   VERILOG:=${current_dir}/counter_zynq.v
+   else ifeq ($(TARGET),nexys_video)
+   PARTNAME:= xc7a200tsbg484-1
+   XDC:=${current_dir}/nexys_video.xdc
+   DEVICE:= xc7a200t_test
+   BOARD_BUILDDIR := ${BUILDDIR}/nexys_video
+   else
+   PARTNAME:= xc7a35tcpg236-1
+   XDC:=${current_dir}/basys3.xdc
+   BOARD_BUILDDIR := ${BUILDDIR}/basys3
+   endif
+
+This ifeq else ifeq works as an if else block to set specific PARTNAMES and DEVICE parameters given the board type as defined in the TARGET variable set before running make.
+
 Constraint files
 ----------------
 

docs/personal-designs.rst

@@ -54,7 +54,7 @@ Finally, activate your Conda environment:
 
 Preparing Your Design 
 ----------------------
-Building a design in symbiflow requires three parts, the HDL files for your design, a constraints file, and a Makefile. For simplicity, all three of these design files should be moved to a single directory in the location of your choosing.
+Building a design in symbiflow requires three parts, the HDL files for your design, a constraints file, and a Makefile. For simplicity, all three of these design files should be moved to a single directory. The location of the directory does not mater as long as the three design files are all within said directory.
 
 HDL Files
 ++++++++++
@@ -71,7 +71,7 @@ Makefile
 +++++++++
 To learn about how Makefiles in symbiflow work, see `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_ page.
 
-If you have used verilog as your HDL and an XDC as your constraint, you can add this :download:`Makefile <master_makefile/Makefile>` to your design directory instead of building your own.
+If you have used verilog as your HDL and an XDC as your constraint, you can add this :download:`Makefile <master_makefile/Makefile>` to your design directory instead of building your own. If you have used a different HDL or constraint file you can find instructions for how to create a makefile for these designs in `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_ page.  
 
 
 Building your personal projects