f4pga-examples/xc7/linux_litex_demo
hasheddan d10ea3861d
Minor typo fix in arty linux litex demo guide
Update excepts to expects in linux litex arty demo guide.

Signed-off-by: hasheddan <georgedanielmangum@gmail.com>
2021-03-03 19:50:38 -06:00
..
buildroot Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
emulator Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
Makefile Add .DELETE_ON_ERROR to Makefiles (issue #119). 2021-01-25 14:57:00 -08:00
README.rst Minor typo fix in arty linux litex demo guide 2021-03-03 19:50:38 -06:00
VexRiscv_Linux.v Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
arty.pcf Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
arty.sdc Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
arty.xdc Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
baselitex_arty.v Really remove the LOC; try to get 100T linux demo to run. 2020-09-23 14:53:43 -07:00
images.json linux_litex_demo: move images.json out of examples directory 2020-09-18 11:36:53 +02:00
mem.init Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
mem_1.init Remove the extra examples directory. 2020-07-29 12:26:38 -07:00
mem_2.init Remove the extra examples directory. 2020-07-29 12:26:38 -07:00

README.rst

Linux LiteX demo
~~~~~~~~~~~~~~~~

This example design features a Linux-capable SoC based around VexRiscv soft
CPU. It also includes DDR and Ethernet controllers. To build the litex example,
run the following commands:

.. code-block:: bash
   :name: example-litex-deps

   wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
   chmod +x litex_setup.py
   ./litex_setup.py init
   ./litex_setup.py install
   wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14.tar.gz
   tar -xf riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14.tar.gz
   export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14/bin/
   cd litex-boards/litex_boards/targets
   ./arty.py --toolchain symbiflow --cpu-type vexriscv --build
   cd -

To build the linux-litex-demo example, depending on your hardware, run:

.. code-block:: bash
   :name: example-litex-a35t-group

   TARGET="arty_35" make -C linux_litex_demo

.. code-block:: bash
   :name: example-litex-a100t-group

   TARGET="arty_100" make -C linux_litex_demo

At completion, the bitstreams are located in the build directory:

.. code-block:: bash

   cd linux_litex_demo/build/<board>

Now you can upload the design with:

.. code-block:: bash

   openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"

.. note::

   LiteX on Linux demo expects you to use IPv4 address of ``192.168.100.100/24``
   on your network interface.

You should observe the following line in the OpenOCD output

.. code-block:: bash

   Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)

In the ``picocom`` terminal, you should observe the following output:

.. image:: ../../docs/images/linux-example-console.gif
   :align: center
   :width: 80%

Additionally, two LED's on the board should be turned on

.. image:: ../../docs/images/linux-example-arty.jpg
   :width: 49%
   :align: center