66 lines
2.0 KiB
ReStructuredText
66 lines
2.0 KiB
ReStructuredText
Linux LiteX demo
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~~~~~~~~~~~~~~~~
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This example design features a Linix-capable SoC based around VexRiscv soft
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CPU. It also includes DDR and Ethernet controllers. To build the litex example,
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run the following commands:
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.. code-block:: bash
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:name: example-litex-deps
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wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py;
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chmod +x litex_setup.py;
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./litex_setup.py init;
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./litex_setup.py install;
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wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14.tar.gz;
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tar -xf riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14.tar.gz;
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export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-8.1.0-2019.01.0-x86_64-linux-ubuntu14/bin/;
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pushd litex/litex/boards/targets && ./arty.py --toolchain symbiflow --cpu-type vexriscv --build && popd
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To build the linux-litex-demo example, depending on your hardware, run:
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.. code-block:: bash
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:name: example-litex-a35t-group
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TARGET="arty_35" make -C linux_litex_demo
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.. code-block:: bash
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:name: example-litex-a100t-group
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TARGET="arty_100" make -C linux_litex_demo
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At completion, the bitstreams are located in the build directory:
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.. code-block:: bash
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cd linux_litex_demo/build/<board>
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Now you can upload the design with:
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.. code-block:: bash
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openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
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.. note::
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LiteX on Linux demo excepts you to use IPv4 address of ``192.168.100.100/24``
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on your network interface.
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You should observe the following line in the OpenOCD output
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.. code-block:: bash
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Info : JTAG tap: xc7.tap tap/device found: 0x0362d093 (mfg: 0x049 (Xilinx), part: 0x362d, ver: 0x0)
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In the ``picocom`` terminal, you should observe the following output:
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.. image:: ../../docs/images/linux-example-console.gif
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:align: center
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:width: 80%
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Additionally, two LED's on the board should be turned on
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.. image:: ../../docs/images/linux-example-arty.jpg
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:width: 49%
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:align: center
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