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https://github.com/chipsalliance/f4pga-examples.git
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199 lines
No EOL
5.9 KiB
ReStructuredText
199 lines
No EOL
5.9 KiB
ReStructuredText
Understanding the Makefile in Symbiflow
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==========================================
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A key steep in creating your own designs is understanding how to use the Makefiles in symbiflow. This tutorial walks you through some of the key aspects of working with the Makefiles in symbiflow to allow for better debugging.
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Example
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-------
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To understand how the Makfiles within symbiflow are setup lets take a look at a more simple Makefile that will run the symbiflow counter test on the basys3 board. Highlighted lines within the code bellow are of particular interest and will change depending on your design and hardware.
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.. code-block:: bash
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:name: makefile-example
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:emphasize-lines: 4, 5, 9, 10
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:linenos:
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mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
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current_dir := $(patsubst %/,%,$(dir $(mkfile_path)))
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TOP:=top
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VERILOG:=${current_dir}/counter.v
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DEVICE := xc7a50t_test
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BITSTREAM_DEVICE := artix7
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BUILDDIR:=build
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PARTNAME:= xc7a35tcpg236-1
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XDC:=${current_dir}/basys3.xdc
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BOARD_BUILDDIR := ${BUILDDIR}/basys3
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.DELETE_ON_ERROR:
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all: ${BOARD_BUILDDIR}/${TOP}.bit
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${BOARD_BUILDDIR}:
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mkdir -p ${BOARD_BUILDDIR}
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${BOARD_BUILDDIR}/${TOP}.eblif: | ${BOARD_BUILDDIR}
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cd ${BOARD_BUILDDIR} && symbiflow_synth -t ${TOP} -v ${VERILOG} -d ${BITSTREAM_DEVICE} -p ${PARTNAME} -x ${XDC} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.net: ${BOARD_BUILDDIR}/${TOP}.eblif
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cd ${BOARD_BUILDDIR} && symbiflow_pack -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.place: ${BOARD_BUILDDIR}/${TOP}.net
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cd ${BOARD_BUILDDIR} && symbiflow_place -e ${TOP}.eblif -d ${DEVICE} -n ${TOP}.net -P ${PARTNAME} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.route: ${BOARD_BUILDDIR}/${TOP}.place
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cd ${BOARD_BUILDDIR} && symbiflow_route -e ${TOP}.eblif -d ${DEVICE} 2>&1 > /dev/null
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${BOARD_BUILDDIR}/${TOP}.fasm: ${BOARD_BUILDDIR}/${TOP}.route
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cd ${BOARD_BUILDDIR} && symbiflow_write_fasm -e ${TOP}.eblif -d ${DEVICE}
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${BOARD_BUILDDIR}/${TOP}.bit: ${BOARD_BUILDDIR}/${TOP}.fasm
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cd ${BOARD_BUILDDIR} && symbiflow_write_bitstream -d ${BITSTREAM_DEVICE} -f ${TOP}.fasm -p ${PARTNAME} -b ${TOP}.bit
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clean:
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rm -rf ${BUILDDIR}
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Lets go over the highlighted lines one by one and discuss their purpose.
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Adding HDL files to your design
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----------------------------------
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Line 4 in the Makefile shows how to add HDL files to the design. The general syntax is: ``<HDL language>:=${current_dir}/<your HDL file path>``. You can also add multiple HDL files to a design using the following syntax:
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.. code-block:: bash
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:name: multi-file-example
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<HDL language> := ${current_dir}/<HDL file> \
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${current_dir}/<HDL file>\
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${current_dir}/<HDL file> \
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${current_dir}/<HDL file> \
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...
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You could also use wildcards to collect all HDL file types of a specific extension and add them to your design. For example, if you wanted to add all verilog files within the current directory to your design you should replace line 4 in the makefile with:
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.. code-block:: bash
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:name: wildcard-example
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VERILOG := ${current_dir}/*.v
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As of this writing symbiflow only supports Verilog and SystemVerilog HDL.
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Setting the device constraints
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------------------------------
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Line 5 in the example sets the device type for the project. Several different board types are supported and a listing of the commands for each board type follows:
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.. tabs::
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.. group-tab:: Arty_35T
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.. code-block:: bash
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:name: example-counter-a35t-group
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DEVICE:= xc7a50t_test
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.. group-tab:: Arty_100T
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.. code-block:: bash
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:name: example-counter-a100t-group
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DEVICE:= xc7a100t_test
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.. group-tab:: Nexus 4 DDR
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.. code-block:: bash
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:name: example-counter-nexys4ddr-group
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DEVICE:= xc7a100t_test
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.. group-tab:: Basys3
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.. code-block:: bash
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:name: example-counter-basys3-group
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DEVICE:= xc7a50t_test
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.. group-tab:: Zybo Z7
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.. code-block:: bash
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:name: example-counter-zybo-group
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DEVICE:= xc7z010_test
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.. group-tab:: Nexys Video
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.. code-block:: bash
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:name: example-counter-nexys_video-group
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DEVICE:= xc7a200t_test
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As shown on line 9 of the example makefile you will also need to define the part your FPGA uses. To do this you need to add the following line of code to your makefile depending on your hardware:
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.. tabs::
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.. group-tab:: Arty_35T
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.. code-block:: bash
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:name: example-part-a35t-group
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PARTNAME := xc7a35tcsg324-1
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.. group-tab:: Arty_100T
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.. code-block:: bash
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:name: example-part-a100t-group
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PARTNAME:= xc7a100tcsg324-1
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.. group-tab:: Nexus 4 DDR
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.. code-block:: bash
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:name: example-part-nexys4ddr-group
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PARTNAME:= xc7a100tcsg324-1
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.. group-tab:: Basys3
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.. code-block:: bash
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:name: example-part-basys3-group
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PARTNAME:= xc7a35tcpg236-1
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.. group-tab:: Zybo Z7
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.. code-block:: bash
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:name: example-part-zybo-group
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PARTNAME:= xc7z010clg400-1
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.. group-tab:: Nexys Video
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.. code-block:: bash
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:name: example-part-nexys_video-group
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PARTNAME:= xc7a200tsbg484-1
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Constraint files
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----------------
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Line 10 shows how you can specify what the constraint files are for your design. The general syntax depends on wether you are using XDC files or a SDC+PCF pair:
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.. tabs::
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.. group-tab:: XDC
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.. code-block:: bash
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XDC:=${current_dir}/<name of XDC file>
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.. group-tab:: SDC+PCF
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.. code-block:: bash
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PCF := ${current_dir}/<name of PCF file>
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SDC := ${current_dir}/<name of SDC file>
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Note that the lines 22, 25, 28, and 31 (.eblif, net, place, and route) may will need to change depending on if you use an XDC file or some combination of SDC, PCF and XDC. |