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f4pga-examples
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Example designs showing different ways to use F4PGA toolchains.
7 Commits 10 Branches 0 Tags 117 MiB
Verilog 97.1%
Tcl 1.7%
Makefile 0.7%
SystemVerilog 0.5%
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Joanna Brozek fcb1cb0032 Update .travis.yml 
Signed-off-by: Joanna Brozek <jbrozek@antmicro.com>
 		2020-04-23 11:48:12 +02:00
counter_test counter_test: Redirect noisy logs 2020-04-22 13:01:16 +02:00
linux_litex_demo Add linux-litex demo sources 2020-04-22 13:01:16 +02:00
picosoc_demo Add picosoc demo sources 2020-04-22 13:01:16 +02:00
.travis.yml Update .travis.yml 2020-04-23 11:48:12 +02:00
LICENSE Add LICENSE 2020-04-21 14:58:08 +02:00