f4pga/source/toolchain-desc.rst

Toolchain description
=====================

This section provides a description of the Symbiflow toolchain
as well as the basic concepts of the FPGA design flow.

.. toctree::
   :maxdepth: 3

   symbiflow-arch-defs/docs/source/getting-started
   toolchain-desc/design-flow
   toolchain-desc/yosys
   vtr-verilog-to-routing/doc/src/vpr/index
Add SymbiFlow toolchain description Describe the synthesis and place and route process. Add short description of Yosys synthesis tool. Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com> 2019-09-03 08:23:34 -04:00			`Toolchain description`
			`=====================`

			`This section provides a description of the Symbiflow toolchain`
			`as well as the basic concepts of the FPGA design flow.`

			`.. toctree::`
			`:maxdepth: 3`

			`symbiflow-arch-defs/docs/source/getting-started`
			`toolchain-desc/design-flow`
			`toolchain-desc/yosys`
Replace VPR abstract with official VPR documentation Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> 2019-09-20 03:21:45 -04:00			`vtr-verilog-to-routing/doc/src/vpr/index`