41 lines
1.6 KiB
ReStructuredText
41 lines
1.6 KiB
ReStructuredText
|
Supported Architectures
|
||
|
#######################
|
||
|
|
||
|
Bitstream documentation
|
||
|
=======================
|
||
|
|
||
|
.. table::
|
||
|
:align: center
|
||
|
:widths: 40 20 20 20
|
||
|
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Projects | IceStorm | X-Ray | Trellis |
|
||
|
+=================+==========+==========+=========+
|
||
|
| **Basic Tiles** |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Logic | Yes | Yes | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Block RAM | Yes | Partial | N/A |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| **Advanced Tiles** |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| DSP | Yes | No | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Hard Blocks | Yes | No | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Clock Tiles | Yes | Partial | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| IO Tiles | Yes | Partial | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| **Routing** |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Logic | Yes | Yes | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
| Clock | Yes | Partial | Yes |
|
||
|
+-----------------+----------+----------+---------+
|
||
|
|
||
|
Boards
|
||
|
======
|
||
|
|
||
|
See `f4pga.org: Supported boards <https://f4pga.org/#boards>`__.
|