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< span id = "flows" > < / span > < h1 id = "flows-index--page-root" > Introduction< a class = "headerlink" href = "#flows-index--page-root" title = "Link to this heading" > ¶< / a > < / h1 >
< p > This section provides a description of the F4PGA toolchain as well as the basic concepts of the FPGA design flow.< / p >
< p > F4PGA is an end-to-end FPGA synthesis toolchain, because of that it provides all the necessary tools to convert input
Hardware Description Language (HDL) sources into a final bitstream.
It is simple to use however, the whole synthesis and implementation process is not trivial.< / p >
< p > The final bitstream format depends on the used platform.
What’
implemented in a different way.
In order to be able to match all that variety of possible situations, the creation of the final bitstream is divided
into few steps.
F4PGA uses different programs to create the bitstream and is responsible for their proper integration.
The procedure of converting HDL files into the bitstream is described in the next sections.< / p >
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< p > < span class = "caption-number" > Fig. 1 < / span > < span class = "caption-text" > F4PGA Toolchain design flow< / span > < a class = "headerlink" href = "#id1" title = "Link to this image" > ¶< / a > < / p >
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