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<section id="foss-flows-for-fpga">
<h1 id="index--page-root">FOSS Flows For FPGA<a class="headerlink" href="#index--page-root" title="Link to this heading"></a></h1>
<p><a class="reference external" href="https://f4pga.org/">F4PGA ➚</a>, which is a Workgroup under the <a class="reference external" href="https://chipsalliance.org">CHIPS Alliance ➚</a>, is an
Open Source solution for Hardware Description Language (HDL) to Bitstream FPGA synthesis, currently targeting
Xilinx’s 7-Series, QuickLogic’s EOS-S3, and Lattice’ iCE40 and ECP5 devices.
Think of it as the GCC of FPGAs.
The project aims to design tools that are highly extendable and multiplatform.</p>
<img alt="_images/hero.svg" class="align-center" src="_images/hero.svg"/>
<p>The elements of the project include (but are not limited to):</p>
<ul class="simple">
<li><p>The F4PGA open source FPGA toolchains for programming FPGAs (formerly known as <a class="extlink-gh reference external" href="https://github.com/https://github.com/SymbiFlow">SymbiFlow ➚</a>):</p>
<ul>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/f4pga/tree/main/f4pga">F4PGA Python CLI ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/f4pga-arch-defs">F4PGA Architecture Definitions ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/f4pga-examples">F4PGA Examples ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/yosys-f4pga-plugins">F4PGA Yosys plugins ➚</a></p></li>
</ul>
</li>
<li><p>The FPGA interchange format (an interchange format defined by CHIPS Alliance to enable interoperability between
different FPGA tools) adopted by the F4PGA toolchain:</p>
<ul>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/fpga-interchange-schema">FPGA Interchange schema ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/python-fpga-interchange">FPGA Interchange Python utilities ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/fpga-interchange-tests">FPGA Interchange Test suite ➚</a></p></li>
</ul>
</li>
<li><p>The <a class="extlink-gh reference external" href="https://github.com/chipsalliance/fpga-tool-perf">FPGA tool performance framework ➚</a> framework for benchmarking
designs against various FPGA tools, and vice versa, over time.</p></li>
<li><p>FPGA visualisation tools for visual exploration of FPGA bitstream and databases:</p>
<ul>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/f4pga-bitstream-viewer">F4PGA bitstream viewer ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/f4pga-database-visualizer">F4PGA database visualizer ➚</a></p></li>
</ul>
</li>
<li><p>Other utilities (FPGA assembly format, documentation and other):</p>
<ul>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/fasm">F4PGA Assembly (FASM) ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/f4pga-xc-fasm">Xilinx bitstream generation library ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/vtr-xml-utils">Verilog-to-routing XML utilities ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/chipsalliance/python-sdf-timing">SDF format utilities ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/symbiflow-tools-data-manager">F4PGA tools data manager ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/sphinx_symbiflow_theme">F4PGA Sphinx Theme ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/sphinxcontrib-hdl-diagrams">F4PGA Sphinx HDL diagrams ➚</a></p></li>
<li><p><a class="extlink-gh reference external" href="https://github.com/SymbiFlow/sphinx-verilog-domain">F4PGA Sphinx Verilog domain ➚</a></p></li>
</ul>
</li>
</ul>
<section id="table-of-contents">
<h2 id="table-of-contents">Table of Contents<a class="headerlink" href="#table-of-contents" title="Link to this heading"></a></h2>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">About F4PGA</span></p>
<ul>
<li class="toctree-l1"><a class="reference internal" href="getting-started.html">Getting started</a><ul>
<li class="toctree-l2"><a class="reference internal" href="getting-started.html#guidelines">Guidelines</a></li>
<li class="toctree-l2"><a class="reference internal" href="getting-started.html#toolchain-installation">Toolchain installation</a><ul>
<li class="toctree-l3"><a class="reference internal" href="getting-started.html#conda-recommended">Conda (Recommended)</a><ul>
<li class="toctree-l4"><a class="reference internal" href="getting-started.html#bumping-overriding-specific-tools">Bumping/overriding specific tools</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="getting-started.html#other">Other</a><ul>
<li class="toctree-l4"><a class="reference internal" href="getting-started.html#containers">Containers</a></li>
</ul>
</li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="getting-started.html#loading-bitstreams">Loading bitstreams</a><ul>
<li class="toctree-l3"><a class="reference internal" href="getting-started.html#installing-openfpgaloader">Installing OpenFPGALoader</a></li>
<li class="toctree-l3"><a class="reference internal" href="getting-started.html#usage">Usage</a></li>
</ul>
</li>
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<li class="toctree-l1"><a class="reference internal" href="status.html">Supported Architectures</a><ul>
<li class="toctree-l2"><a class="reference internal" href="status.html#bitstream-documentation">Bitstream documentation</a></li>
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<p class="caption" role="heading"><span class="caption-text">Python utils</span></p>
<ul>
<li class="toctree-l1"><a class="reference internal" href="f4pga/index.html">Overview</a><ul>
<li class="toctree-l2"><a class="reference internal" href="f4pga/index.html#references">References</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="f4pga/Usage.html">Usage</a><ul>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Usage.html#getting-started">Getting started</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Usage.html#fundamental-concepts">Fundamental concepts</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Usage.html#build-a-target">Build a target</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Usage.html#common-targets-and-values">Common targets and values</a></li>
</ul>
</li>
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<li class="toctree-l2"><a class="reference internal" href="f4pga/modules/index.html#interface">Interface</a></li>
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</li>
<li class="toctree-l1"><a class="reference internal" href="f4pga/DevNotes.html">Developer’s notes</a><ul>
<li class="toctree-l2"><a class="reference internal" href="f4pga/DevNotes.html#last-update-2022-05-06">Last update: 2022-05-06</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/DevNotes.html#project-s-structure">Project’s structure</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/DevNotes.html#different-subsystems-and-where-to-find-them">Different subsystems and where to find them?</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/DevNotes.html#todo">TODO:</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="f4pga/Deprecated.html">Understanding the (deprecated) flow</a><ul>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Deprecated.html#synthesis">Synthesis</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Deprecated.html#place-and-route">Place and Route</a></li>
<li class="toctree-l2"><a class="reference internal" href="f4pga/Deprecated.html#generating-bitstream">Generating Bitstream</a></li>
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<p class="caption" role="heading"><span class="caption-text">Development</span></p>
<ul>
<li class="toctree-l1"><a class="reference internal" href="development/changes.html">Changes</a><ul>
<li class="toctree-l2"><a class="reference internal" href="development/changes.html#tested-environments">Tested environments</a><ul>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id1">8</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id2">7</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id3">6</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id4">5</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id5">4</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id6">3</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id7">2</a></li>
<li class="toctree-l3"><a class="reference internal" href="development/changes.html#id8">1</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="development/changes.html#future-work">Future work</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="development/building-docs.html">Building the documentation</a></li>
<li class="toctree-l1"><a class="reference internal" href="development/venv.html">Packages in virtual environment</a></li>
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<p class="caption" role="heading"><span class="caption-text">Design Flows</span></p>
<ul>
<li class="toctree-l1"><a class="reference internal" href="flows/index.html">Introduction</a></li>
<li class="toctree-l1"><a class="reference internal" href="flows/synthesis.html">Synthesis</a><ul>
<li class="toctree-l2"><a class="reference internal" href="flows/synthesis.html#rtl-generation">RTL Generation</a></li>
<li class="toctree-l2"><a class="reference internal" href="flows/synthesis.html#technology-mapping">Technology mapping</a></li>
<li class="toctree-l2"><a class="reference internal" href="flows/synthesis.html#optimization">Optimization</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="flows/pnr.html">Place &amp; Route</a><ul>
<li class="toctree-l2"><a class="reference internal" href="flows/pnr.html#packing">Packing</a></li>
<li class="toctree-l2"><a class="reference internal" href="flows/pnr.html#placing">Placing</a></li>
<li class="toctree-l2"><a class="reference internal" href="flows/pnr.html#routing">Routing</a></li>
<li class="toctree-l2"><a class="reference internal" href="flows/pnr.html#analysis">Analysis</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="flows/bitstream.html">Bitstream translation</a></li>
<li class="toctree-l1"><a class="reference internal" href="flows/f4pga.html">In F4PGA</a><ul>
<li class="toctree-l2"><a class="reference internal" href="flows/f4pga.html#synthesis">Synthesis</a><ul>
<li class="toctree-l3"><a class="reference internal" href="flows/f4pga.html#yosys">Yosys</a><ul>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#short-description">Short description</a></li>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#usage-in-toolchain">Usage in Toolchain</a></li>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#output-analysis">Output analysis</a></li>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#technology-mapping-in-f4pga-toolchain">Technology mapping in F4PGA toolchain</a></li>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#technology-mapping-for-vpr">Technology mapping for VPR</a></li>
<li class="toctree-l4"><a class="reference internal" href="flows/f4pga.html#more-information">More information</a></li>
</ul>
</li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="flows/f4pga.html#place-route">Place &amp; Route</a><ul>
<li class="toctree-l3"><a class="reference internal" href="flows/f4pga.html#vpr">VPR</a></li>
<li class="toctree-l3"><a class="reference internal" href="flows/f4pga.html#nextpnr">nextpnr</a></li>
</ul>
</li>
</ul>
</li>
</ul>
</div>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Specifications</span></p>
<ul>
<li class="toctree-l1"><a class="reference external" href="https://fasm.readthedocs.io/en/latest/">FPGA Assembly (FASM) ➚</a></li>
<li class="toctree-l1"><a class="reference external" href="https://chipsalliance/fpga-interchange-schema">FPGA Interchange schema ➚</a></li>
</ul>
</div>
<div class="toctree-wrapper compound">
<p class="caption" role="heading"><span class="caption-text">Appendix</span></p>
<ul>
<li class="toctree-l1"><a class="reference internal" href="glossary.html">Glossary</a></li>
<li class="toctree-l1"><a class="reference internal" href="references.html">References</a></li>
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