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f4pga/wrappers/sh/quicklogic: cleanup (#602) 

Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
This commit is contained in:
Unai Martinez-Corral 2022-08-03 13:34:06 +02:00 committed by GitHub
parent cad8afe084 6498205975
commit 033d09cc5c
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
14 changed files with 248 additions and 302 deletions
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6
f4pga/setup.py
View File

@ -88,7 +88,11 @@ setuptools_setup(
package_dir={"f4pga": "."},
package_data={
'f4pga': ['*.json', 'platforms/*.json'],
'f4pga.wrappers.sh': ['xc7/*.f4pga.sh', 'quicklogic/*.f4pga.sh']
'f4pga.wrappers.sh': [
'xc7/*.f4pga.sh',
'quicklogic/*.f4pga.sh',
'quicklogic/env'
]
},
classifiers=[],
python_requires='>=3.6',

14
f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh
View File

@ -18,16 +18,18 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args $@
export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_analysis.log
run_vpr --analysis --gen_post_synthesis_netlist on --gen_post_implementation_merged_netlist on --post_synth_netlist_unconn_inputs nets --post_synth_netlist_unconn_outputs nets --verify_file_digests off
run_vpr \
--analysis \
--gen_post_synthesis_netlist on \
--gen_post_implementation_merged_netlist on \
--post_synth_netlist_unconn_inputs nets \
--post_synth_netlist_unconn_outputs nets \
--verify_file_digests off
mv vpr_stdout.log analysis.log

7
f4pga/wrappers/sh/quicklogic/env
View File

@ -16,10 +16,7 @@
#
# SPDX-License-Identifier: Apache-2.0
MYPATH=`realpath $0`
MYPATH=`dirname ${MYPATH}`
if [ -z $VPRPATH ]; then
export VPRPATH=$MYPATH
export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH="${VPRPATH}/python:${PYTHONPATH}"
fi

64
f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh
View File

@ -37,37 +37,14 @@ OUT_QCF=""
while true; do
case "$1" in
-d|--device)
DEVICE=$2
shift 2
;;
-P|--part)
PART=$2
shift 2
;;
-p|--pcf)
PCF=$2
shift 2
;;
-b|--bit)
BIT=$2
shift 2
;;
-v|--out-verilog)
OUT_VERILOG=$2
shift 2
;;
-o|--out-pcf)
OUT_PCF=$2
shift 2
;;
-q|--out-qcf)
OUT_QCF=$2
shift 2
;;
--)
break
;;
-d|--device) DEVICE=$2; shift 2 ;;
-P|--part) PART=$2; shift 2 ;;
-p|--pcf) PCF=$2; shift 2 ;;
-b|--bit) BIT=$2; shift 2 ;;
-v|--out-verilog) OUT_VERILOG=$2; shift 2 ;;
-o|--out-pcf) OUT_PCF=$2; shift 2 ;;
-q|--out-qcf) OUT_QCF=$2; shift 2 ;;
--) break ;;
esac
done
@ -81,6 +58,10 @@ if [ -z $BIT ]; then
exit 1
fi
if ! [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
echo "ERROR: Unsupported device '${DEVICE}' for fasm2bels"
exit -1
fi
# $DEVICE is not ql-eos-s3 or ql-pp3e
if ! [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
@ -88,15 +69,6 @@ if ! [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
exit -1
fi
# Run fasm2bels
VPR_DB=`readlink -f ${SHARE_DIR_PATH}/arch/${DEVICE}_wlcsp/db_phy.pickle`
FASM2BELS=`readlink -f ${SHARE_DIR_PATH}/scripts/fasm2bels.py`
FASM2BELS_DEVICE=${DEVICE/ql-/}
VERILOG_FILE="${OUT_VERILOG:-$BIT.v}"
PCF_FILE="${OUT_PCF:-$BIT.v.pcf}"
QCF_FILE="${OUT_QCF:-$BIT.v.qcf}"
if [ ! -z "{PCF}" ]; then
PCF_ARGS="--input-pcf ${PCF}"
else
@ -104,4 +76,14 @@ else
fi
echo "Running fasm2bels"
`which python3` ${FASM2BELS} ${BIT} --phy-db ${VPR_DB} --device-name ${FASM2BELS_DEVICE} --package-name ${PART} --input-type bitstream --output-verilog ${VERILOG_FILE} ${PCF_ARGS} --output-pcf ${PCF_FILE} --output-qcf ${QCF_FILE}
echo "Running fasm2bels"
`which python3` "`readlink -f ${SHARE_DIR_PATH}/scripts/fasm2bels.py`" "${BIT}" \
--phy-db "`readlink -f ${SHARE_DIR_PATH}/arch/${DEVICE}_wlcsp/db_phy.pickle`" \
--device-name "${DEVICE/ql-/}" \
--package-name "$PART" \
--input-type bitstream \
--output-verilog "${OUT_VERILOG:-$BIT.v}" \
${PCF_ARGS} \
--output-pcf "${OUT_PCF:-$BIT.v.pcf}" \
--output-qcf "${OUT_QCF:-$BIT.v.qcf}"

25
f4pga/wrappers/sh/quicklogic/generate_bitstream.f4pga.sh
View File

@ -18,7 +18,6 @@
set -e
SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
OPTS=d:f:r:b:P:
LONGOPTS=device:,fasm:,format:,bit:,part:
@ -57,16 +56,26 @@ if [ -z $BIT ]; then
exit 1
fi
DB_ROOT="$F4PGA_SHARE_DIR"/fasm_database/${DEVICE}
# qlf
if [[ "$DEVICE" =~ ^(qlf_k4n8.*)$ ]]; then
QLF_FASM=`which qlf_fasm`
DB_ROOT=`realpath ${SHARE_DIR_PATH}//fasm_database/${DEVICE}`
${QLF_FASM} --db-root ${DB_ROOT} --format ${BIT_FORMAT} --assemble $FASM $BIT
`which qlf_fasm` \
--db-root "${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}/fasm_database/${DEVICE}" \
--format "$BIT_FORMAT" \
--assemble \
"$FASM" \
"$BIT"
elif [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
qlfasm --dev-type ${DEVICE} ${FASM} ${BIT}
qlfasm \
--dev-type \
"$DEVICE" \
"$FASM" \
"$BIT"
else
echo "ERROR: Unsupported device '${DEVICE}' for bitstream generation"
exit -1
fi

56
f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh
View File

@ -29,33 +29,32 @@ CORNER=$7
PROJECT=$(basename -- "$EBLIF")
IOPLACE_FILE="${PROJECT%.*}_io.place"
BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_BIN_DIR"}
SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
PYTHON3=$(which python3)
if [[ "$DEVICE" =~ ^(qlf_.*)$ ]]; then
if [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]];then
DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
DEVICE_2=${DEVICE_1}
DEVICE_PATH="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
PINMAPXML="pinmap_qlf_k4n8_umc22.xml"
elif [[ "$DEVICE" =~ ^(qlf_k6n10_qlf_k6n10)$ ]];then
DEVICE_1="qlf_k6n10-qlf_k6n10_gf12"
DEVICE_2=${DEVICE_1}
DEVICE_PATH="qlf_k6n10-qlf_k6n10_gf12"
PINMAPXML="pinmap_qlf_k6n10_gf12.xml"
else
echo "ERROR: Unknown qlf device '${DEVICE}'"
exit -1
fi
PINMAP_XML=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_1}_${DEVICE_1}/${PINMAPXML}`
IOGEN=`realpath ${SHARE_DIR_PATH}/scripts/qlf_k4n8_create_ioplace.py`
${PYTHON3} ${IOGEN} --pcf $PCF --blif $EBLIF --pinmap_xml $PINMAP_XML --csv_file $PART --net $NET > ${IOPLACE_FILE}
"${PYTHON3}" "`realpath ${SHARE_DIR_PATH}/scripts/qlf_k4n8_create_ioplace.py`" \
--pcf "$PCF" \
--blif "$EBLIF" \
--pinmap_xml "`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_PATH}_${DEVICE_PATH}/${PINMAPXML}`" \
--csv_file "$PART" \
--net "$NET" \
> "${IOPLACE_FILE}"
elif [[ "$DEVICE" =~ ^(ql-.*)$ ]]; then
DEVICE_1=${DEVICE}
DEVICE_2="wlcsp"
if ! [[ "$PART" =~ ^(PU64|WR42|PD64|WD30)$ ]]; then
PINMAPCSV="pinmap_PD64.csv"
@ -68,32 +67,33 @@ elif [[ "$DEVICE" =~ ^(ql-.*)$ ]]; then
echo "PINMAP FILE : $PINMAPCSV"
echo "CLKMAP FILE : $CLKMAPCSV"
PINMAP=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_1}_${DEVICE_2}/${PINMAPCSV}`
CLKMAP=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_1}_${DEVICE_2}/${CLKMAPCSV}`
DEVICE_PATH="${DEVICE}_wlcsp"
PINMAP=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_PATH}/${PINMAPCSV}`
IOGEN=`realpath ${SHARE_DIR_PATH}/scripts/pp3_create_ioplace.py`
PLACEGEN=`realpath ${SHARE_DIR_PATH}/scripts/pp3_create_place_constraints.py`
"${PYTHON3}" `realpath ${SHARE_DIR_PATH}/scripts/pp3_create_ioplace.py` \
--pcf "$PCF" \
--blif "$EBLIF" \
--map "$PINMAP" \
--net "$NET" \
> ${IOPLACE_FILE}
PLACE_FILE="${PROJECT%.*}_constraints.place"
${PYTHON3} ${IOGEN} --pcf $PCF --blif $EBLIF --map $PINMAP --net $NET > ${IOPLACE_FILE}
${PYTHON3} ${PLACEGEN} --blif $EBLIF --map $CLKMAP -i ${IOPLACE_FILE} > ${PLACE_FILE}
"${PYTHON3}" `realpath ${SHARE_DIR_PATH}/scripts/pp3_create_place_constraints.py` \
--blif "$EBLIF" \
--map "`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_PATH}/${CLKMAPCSV}`" \
-i "$IOPLACE_FILE" \
> "${PROJECT%.*}_constraints.place"
# EOS-S3 IOMUX configuration
if [[ "$DEVICE" =~ ^(ql-eos-s3)$ ]]; then
IOMUXGEN=`realpath ${SHARE_DIR_PATH}/scripts/pp3_eos_s3_iomux_config.py`
IOMUX_JLINK="${PROJECT%.*}_iomux.jlink"
IOMUX_OPENOCD="${PROJECT%.*}_iomux.openocd"
IOMUX_BINARY="${PROJECT%.*}_iomux.bin"
${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=jlink > ${IOMUX_JLINK}
${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=openocd > ${IOMUX_OPENOCD}
${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=binary > ${IOMUX_BINARY}
"${PYTHON3}" "${IOMUXGEN}" --eblif "$EBLIF" --pcf "$PCF" --map "$PINMAP" --output-format=jlink > "${PROJECT%.*}_iomux.jlink"
"${PYTHON3}" "${IOMUXGEN}" --eblif "$EBLIF" --pcf "$PCF" --map "$PINMAP" --output-format=openocd > "${PROJECT%.*}_iomux.openocd"
"${PYTHON3}" "${IOMUXGEN}" --eblif "$EBLIF" --pcf "$PCF" --map "$PINMAP" --output-format=binary > "${PROJECT%.*}_iomux.bin"
fi
else
echo "FIXME: Unsupported device '${DEVICE}'"
exit -1
fi

10
f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh
View File

@ -35,9 +35,9 @@ ARCH_DIR="$F4PGA_SHARE_DIR"/arch/${DEVICE_1}_${DEVICE_1}
PINMAP_XML=${ARCH_DIR}/${PINMAPXML}
`which python3` "$F4PGA_SHARE_DIR"/scripts/create_lib.py \
-n ${DEV}_0P72_SSM40 \
-n "${DEV}_0P72_SSM40" \
-m fpga_top \
-c $PART \
-x ${ARCH_DIR}/lib/${INTERFACEXML} \
-l ${DEV}_0P72_SSM40.lib \
-t ${ARCH_DIR}/lib
-c "$PART" \
-x "${ARCH_DIR}/lib/${INTERFACEXML}" \
-l "${DEV}_0P72_SSM40.lib" \
-t "${ARCH_DIR}/lib"

11
f4pga/wrappers/sh/quicklogic/pack.f4pga.sh
View File

@ -18,16 +18,15 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args $@
export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_pack.log
run_vpr --pack --write_block_usage block_usage.json
run_vpr \
--pack \
--write_block_usage \
block_usage.json
mv vpr_stdout.log pack.log

6
f4pga/wrappers/sh/quicklogic/place.f4pga.sh
View File

@ -18,11 +18,7 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args $@

5
f4pga/wrappers/sh/quicklogic/repack.f4pga.sh
View File

@ -18,10 +18,7 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args $@

6
f4pga/wrappers/sh/quicklogic/route.f4pga.sh
View File

@ -18,11 +18,7 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args $@

3
f4pga/wrappers/sh/quicklogic/synth.f4pga.sh
View File

@ -18,8 +18,9 @@
set -e
source $(dirname "$0")/env
export SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
VPRPATH=${VPRPATH:="$F4PGA_BIN_DIR"}
SPLIT_INOUTS=`realpath ${SHARE_DIR_PATH}/scripts/split_inouts.py`
CONVERT_OPTS=`realpath ${SHARE_DIR_PATH}/scripts/convert_compile_opts.py`

61
f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh
View File

@ -50,49 +50,17 @@ function parse_args {
while true; do
case "$1" in
-d|--device)
DEVICE=$2
shift 2
;;
-f|--family)
FAMILY=$2
shift 2
;;
-e|--eblif)
EBLIF=$2
shift 2
;;
-p|--pcf)
PCF=$2
shift 2
;;
-n|--net)
NET=$2
shift 2
;;
-P|--part)
PART=$2
shift 2
;;
-j|--json)
JSON=$2
shift 2
;;
-s|--sdc)
SDC=$2
shift 2
;;
-t|--top)
TOP=$2
shift 2
;;
-c|--corner)
CORNER=$2
shift 2
;;
--)
break
;;
-d|--device) DEVICE=$2; shift 2 ;;
-f|--family) FAMILY=$2; shift 2 ;;
-e|--eblif) EBLIF=$2; shift 2 ;;
-p|--pcf) PCF=$2; shift 2 ;;
-n|--net) NET=$2; shift 2 ;;
-P|--part) PART=$2; shift 2 ;;
-j|--json) JSON=$2; shift 2 ;;
-s|--sdc) SDC=$2; shift 2 ;;
-t|--top) TOP=$2; shift 2 ;;
-c|--corner) CORNER=$2; shift 2 ;;
--) break ;;
esac
done
@ -179,12 +147,11 @@ function run_vpr {
set -e
SDC_OPTIONS=""
if [ ! -z $SDC ]
then
if [ ! -z $SDC ]; then
SDC_OPTIONS="--sdc_file $SDC"
fi
`which vpr` ${ARCH_DEF} \
"`which vpr`" ${ARCH_DEF} \
${EBLIF} \
--read_rr_graph ${RR_GRAPH} \
--device ${DEVICE_NAME} \
@ -200,7 +167,7 @@ function run_vpr {
function run_genfasm {
set -e
`which genfasm` ${ARCH_DEF} \
"`which genfasm`" ${ARCH_DEF} \
${EBLIF} \
--device ${DEVICE_NAME} \
${VPR_OPTIONS} \

6
f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh
View File

@ -18,11 +18,7 @@
set -e
if [ -z $VPRPATH ]; then
export VPRPATH="$F4PGA_BIN_DIR"
export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
fi
source $(dirname "$0")/env
source $(dirname "$0")/vpr_common.f4pga.sh
parse_args "$@"