f4pga/modules/{analysis|route}: fix vpr_options (#618)
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commit
137f61afb4
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@ -110,21 +110,25 @@ class VprArgs:
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optional: list
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def __init__(
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self, share: str, eblif, values: Namespace, sdc_file: "str | None" = None, vpr_extra_opts: "list | None" = None
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self,
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share: str,
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eblif,
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arch_def,
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lookahead,
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rr_graph,
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place_delay,
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device_name,
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vpr_options={},
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sdc_file: "str | None" = None,
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):
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self.arch_dir = str(Path(share) / "arch")
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self.arch_def = values.arch_def
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self.lookahead = values.rr_graph_lookahead_bin
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self.rr_graph = values.rr_graph_real_bin
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self.place_delay = values.vpr_place_delay
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self.device_name = values.vpr_grid_layout_name
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self.arch_def = arch_def
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self.lookahead = lookahead
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self.rr_graph = rr_graph
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self.place_delay = place_delay
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self.device_name = device_name
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self.eblif = str(Path(eblif).resolve())
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if values.vpr_options is not None:
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self.optional = options_dict_to_list(values.vpr_options)
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else:
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self.optional = []
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if vpr_extra_opts is not None:
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self.optional += vpr_extra_opts
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self.optional = options_dict_to_list(vpr_options)
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if sdc_file is not None:
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self.optional += ["--sdc_file", sdc_file]
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@ -41,10 +41,22 @@ class analysisModule(Module):
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def execute(self, ctx: ModuleContext):
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build_dir = Path(ctx.takes.eblif).parent
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vpr_options = options_dict_to_list(ctx.values.vpr_options) if ctx.values.vpr_options else []
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yield "Analysis with VPR..."
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common_vpr("analysis", VprArgs(ctx.share, ctx.takes.eblif, ctx.values, sdc_file=ctx.takes.sdc), cwd=build_dir)
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common_vpr(
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"analysis",
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VprArgs(
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share=ctx.share,
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eblif=ctx.takes.eblif,
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arch_def=ctx.values.arch_def,
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lookahead=ctx.values.rr_graph_lookahead_bin,
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rr_graph=ctx.values.rr_graph_real_bin,
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place_delay=ctx.values.vpr_place_delay,
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device_name=ctx.values.vpr_grid_layout_name,
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vpr_options=ctx.values.vpr_options if ctx.values.vpr_options else {},
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sdc_file=ctx.takes.sdc,
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),
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cwd=build_dir,
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)
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if ctx.is_output_explicit("merged_post_implementation_v"):
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Path(analysis_merged_post_implementation_file(ctx)).rename(ctx.outputs.merged_post_implementation_v)
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@ -31,7 +31,16 @@ class FasmModule(Module):
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def execute(self, ctx: ModuleContext):
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build_dir = str(Path(ctx.takes.eblif).parent)
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vprargs = VprArgs(ctx.share, ctx.takes.eblif, ctx.values)
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vprargs = VprArgs(
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share=ctx.share,
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eblif=ctx.takes.eblif,
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arch_def=ctx.values.arch_def,
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lookahead=ctx.values.rr_graph_lookahead_bin,
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rr_graph=ctx.values.rr_graph_real_bin,
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place_delay=ctx.values.vpr_place_delay,
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device_name=ctx.values.vpr_grid_layout_name,
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vpr_options=ctx.values.vpr_options if ctx.values.vpr_options else {},
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)
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optional = []
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if ctx.values.pnr_corner is not None:
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@ -42,7 +42,21 @@ class PackModule(Module):
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build_dir = Path(ctx.outputs.net).parent
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yield "Packing with VPR..."
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common_vpr("pack", VprArgs(ctx.share, ctx.takes.eblif, ctx.values, sdc_file=ctx.takes.sdc), cwd=build_dir)
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common_vpr(
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"pack",
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VprArgs(
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share=ctx.share,
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eblif=ctx.takes.eblif,
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arch_def=ctx.values.arch_def,
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lookahead=ctx.values.rr_graph_lookahead_bin,
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rr_graph=ctx.values.rr_graph_real_bin,
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place_delay=ctx.values.vpr_place_delay,
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device_name=ctx.values.vpr_grid_layout_name,
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vpr_options=ctx.values.vpr_options if ctx.values.vpr_options else {},
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sdc_file=ctx.takes.sdc,
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),
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cwd=build_dir,
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)
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og_log = build_dir / "vpr_stdout.log"
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@ -41,21 +41,25 @@ class PlaceModule(Module):
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return {"place": default_output_name(ctx.takes.eblif)}
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def execute(self, ctx: ModuleContext):
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place_constraints = ctx.takes.place_constraints
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build_dir = ctx.takes.build_dir
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vpr_options = ["--fix_clusters", place_constraints] if place_constraints else []
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vpr_options = ctx.values.vpr_options if ctx.values.vpr_options else {}
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if ctx.takes.place_constraints:
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vpr_options.update({"fix_clusters": ctx.takes.place_constraints})
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yield "Running VPR..."
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common_vpr(
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"place",
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VprArgs(
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ctx.share,
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ctx.takes.eblif,
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ctx.values,
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share=ctx.share,
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eblif=ctx.takes.eblif,
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arch_def=ctx.values.arch_def,
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lookahead=ctx.values.rr_graph_lookahead_bin,
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rr_graph=ctx.values.rr_graph_real_bin,
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place_delay=ctx.values.vpr_place_delay,
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device_name=ctx.values.vpr_grid_layout_name,
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vpr_options=vpr_options,
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sdc_file=ctx.takes.sdc,
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vpr_extra_opts=["--fix_clusters", place_constraints],
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),
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cwd=build_dir,
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)
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@ -34,10 +34,22 @@ class RouteModule(Module):
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def execute(self, ctx: ModuleContext):
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build_dir = Path(ctx.takes.eblif).parent
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vpr_options = options_dict_to_list(ctx.values.vpr_options) if ctx.values.vpr_options else []
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yield "Routing with VPR..."
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common_vpr("route", VprArgs(ctx.share, ctx.takes.eblif, ctx.values, sdc_file=ctx.takes.sdc), cwd=build_dir)
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common_vpr(
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"route",
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VprArgs(
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share=ctx.share,
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eblif=ctx.takes.eblif,
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arch_def=ctx.values.arch_def,
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lookahead=ctx.values.rr_graph_lookahead_bin,
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rr_graph=ctx.values.rr_graph_real_bin,
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place_delay=ctx.values.vpr_place_delay,
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device_name=ctx.values.vpr_grid_layout_name,
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vpr_options=ctx.values.vpr_options if ctx.values.vpr_options else {},
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sdc_file=ctx.takes.sdc,
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),
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cwd=build_dir,
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)
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if ctx.is_output_explicit("route"):
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route_place_file(ctx).rename(ctx.outputs.route)
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