f4pga/flows/common_modules/route: pass vpr_extra_options

Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>

f4pga/flows/modules/route.py

@@ -34,10 +34,18 @@ class RouteModule(Module):
     def execute(self, ctx: ModuleContext):
         build_dir = Path(ctx.takes.eblif).parent
 
-        vpr_options = options_dict_to_list(ctx.values.vpr_options) if ctx.values.vpr_options else []
-
         yield "Routing with VPR..."
-        common_vpr("route", VprArgs(ctx.share, ctx.takes.eblif, ctx.values, sdc_file=ctx.takes.sdc), cwd=build_dir)
+        common_vpr(
+            "route",
+            VprArgs(
+                ctx.share,
+                ctx.takes.eblif,
+                ctx.values,
+                sdc_file=ctx.takes.sdc,
+                vpr_extra_opts=options_dict_to_list(ctx.values.vpr_options) if ctx.values.vpr_options else None,
+            ),
+            cwd=build_dir,
+        )
 
         if ctx.is_output_explicit("route"):
             route_place_file(ctx).rename(ctx.outputs.route)