Merge pull request #1 from umarcor/umarcor/refs
readme: update references
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# FOSS Flow For FPGA (F4PGA) project
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# FOSS Flow For FPGA (F4PGA) project
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This is the top-level repository for the F4PGA project, which is a Workgroup under the [CHIPS Alliance](https://chipsalliance.org). The elements of the project include (but are not limited to):
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This is the top-level repository for the F4PGA project, which is a Workgroup under the [CHIPS Alliance](https://chipsalliance.org).
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The elements of the project include (but are not limited to):
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* The F4PGA open source FPGA toolchains for programming FPGAs - formerly known as [SymbiFlow](https://github.com/SymbiFlow). This includes:
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* The F4PGA open source FPGA toolchains for programming FPGAs - formerly known as [SymbiFlow](https://github.com/SymbiFlow). This includes:
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* [F4PGA documentation](https://github.com/SymbiFlow/symbiflow-docs) (knowledge base)
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* [F4PGA documentation](https://github.com/chipsalliance/f4pga-docs) (knowledge base)
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* [F4PGA Architecture Definitions](https://github.com/SymbiFlow/symbiflow-arch-defs)
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* [F4PGA Architecture Definitions](https://github.com/SymbiFlow/f4pga-arch-defs)
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* [F4PGA examples](https://github.com/SymbiFlow/symbiflow-examples)
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* [F4PGA examples](https://github.com/chipsalliance/f4pga-examples)
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* [F4PGA Yosys plugins](https://github.com/SymbiFlow/yosys-symbiflow-plugins)
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* [F4PGA Yosys plugins](https://github.com/f4pga/yosys-f4pga-plugins)
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* The FPGA interchange format - an interchange format defined by CHIPS Alliance to enable interoperability between different FPGA tools - adopted by the F4PGA toolchain:
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* The FPGA interchange format - an interchange format defined by CHIPS Alliance to enable interoperability between different FPGA tools - adopted by the F4PGA toolchain:
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* FPGA Database visualisation tools - tools for visual exploration of FPGA bitstream and databases
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* FPGA Database visualisation tools - tools for visual exploration of FPGA bitstream and databases
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* [F4PGA bitstream viewer](https://github.com/SymbiFlow/symbiflow-bitstream-viewer)
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* [F4PGA bitstream viewer](https://github.com/SymbiFlow/f4pga-bitstream-viewer)
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* [F4PGA database visualizer](https://github.com/antmicro/symbiflow-database-visualizer)
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* [F4PGA database visualizer](https://github.com/chipsalliance/f4pga-database-visualizer)
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* Other utilities - FPGA assembly format, documentation and other utilities
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* Other utilities - FPGA assembly format, documentation and other utilities
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* [F4PGA Assembly (FASM)](https://github.com/SymbiFlow/fasm)
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* [F4PGA Assembly (FASM)](https://github.com/chipsalliance/fasm)
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* [Xilinx bitstream generation library](https://github.com/SymbiFlow/symbiflow-xc-fasm)
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* [Xilinx bitstream generation library](https://github.com/SymbiFlow/f4pga-xc-fasm)
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* [Verilog-to-routing XML utilities](https://github.com/SymbiFlow/vtr-xml-utils)
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* [Verilog-to-routing XML utilities](https://github.com/SymbiFlow/vtr-xml-utils)
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* [SDF format utilities](https://github.com/SymbiFlow/python-sdf-timing)
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* [SDF format utilities](https://github.com/chipsalliance/python-sdf-timing)
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* [F4PGA tools data manager](https://github.com/SymbiFlow/symbiflow-tools-data-manager)
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* [F4PGA tools data manager](https://github.com/SymbiFlow/symbiflow-tools-data-manager)
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* [F4PGA Sphinx Theme](https://github.com/SymbiFlow/sphinx_symbiflow_theme)
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* [F4PGA Sphinx Theme](https://github.com/SymbiFlow/sphinx_symbiflow_theme)
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* [F4PGA Sphinx HDL diagrams](https://github.com/SymbiFlow/sphinxcontrib-hdl-diagrams)
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* [F4PGA Sphinx HDL diagrams](https://github.com/SymbiFlow/sphinxcontrib-hdl-diagrams)
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* [F4PGA Sphinx Verilog domain](https://github.com/SymbiFlow/sphinx-verilog-domain)
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* [F4PGA Sphinx Verilog domain](https://github.com/SymbiFlow/sphinx-verilog-domain)
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The F4PGA Workgroup consists of members from different backgrounds, including FPGA vendors (Xilinx and QuickLogic), industrial users (Google, Antmicro) and academia (University of Toronto), who collaborate to build a more open source and software-driven FPGA ecosystem - IP, tools and workflows - to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.
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The F4PGA Workgroup consists of members from different backgrounds, including FPGA vendors (Xilinx and QuickLogic), industrial users (Google, Antmicro) and academia (University of Toronto), who collaborate to build a more open source and software-driven FPGA ecosystem - IP, tools and workflows - to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.
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