wrappers: sh: ql: use 'which' and remove unnecessary paths from PYTHONPATH

Signed-off-by: Paweł Czarnecki <pczarnecki@antmicro.com>

f4pga/wrappers/sh/quicklogic/analysis.f4pga.sh

@@ -20,7 +20,7 @@ set -e
 
 if [ -z $VPRPATH ]; then
   export VPRPATH="$F4PGA_ENV_BIN"
-  export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
+  export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh

f4pga/wrappers/sh/quicklogic/fasm2bels.f4pga.sh

@@ -84,7 +84,7 @@ if [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
     fi
 
     echo "Running fasm2bels"
-    python3 ${FASM2BELS} ${BIT} --phy-db ${VPR_DB} --device-name ${FASM2BELS_DEVICE} --package-name ${PART} --input-type bitstream --output-verilog ${VERILOG_FILE} ${PCF_ARGS} --output-pcf ${PCF_FILE} --output-qcf ${QCF_FILE}
+    `which python3` ${FASM2BELS} ${BIT} --phy-db ${VPR_DB} --device-name ${FASM2BELS_DEVICE} --package-name ${PART} --input-type bitstream --output-verilog ${VERILOG_FILE} ${PCF_ARGS} --output-pcf ${PCF_FILE} --output-qcf ${QCF_FILE}
 
 else
 

f4pga/wrappers/sh/quicklogic/generate_constraints.f4pga.sh

@@ -32,6 +32,8 @@ IOPLACE_FILE="${PROJECT%.*}_io.place"
 BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_ENV_BIN"}
 SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_ENV_SHARE"}
 
+PYTHON3=$(which python3)
+
 if [[ "$DEVICE" =~ ^(qlf_.*)$ ]]; then
   if [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]];then
     DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
@@ -49,7 +51,7 @@ if [[ "$DEVICE" =~ ^(qlf_.*)$ ]]; then
   PINMAP_XML=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_1}_${DEVICE_1}/${PINMAPXML}`
   IOGEN=`realpath ${BIN_DIR_PATH}/python/qlf_k4n8_create_ioplace.py`
 
-  python3 ${IOGEN} --pcf $PCF --blif $EBLIF --pinmap_xml $PINMAP_XML --csv_file $PART --net $NET > ${IOPLACE_FILE}
+  ${PYTHON3} ${IOGEN} --pcf $PCF --blif $EBLIF --pinmap_xml $PINMAP_XML --csv_file $PART --net $NET > ${IOPLACE_FILE}
 
 elif [[ "$DEVICE" =~ ^(ql-.*)$ ]]; then
   DEVICE_1=${DEVICE}
@@ -74,8 +76,8 @@ elif [[ "$DEVICE" =~ ^(ql-.*)$ ]]; then
 
   PLACE_FILE="${PROJECT%.*}_constraints.place"
 
-  python3 ${IOGEN} --pcf $PCF --blif $EBLIF --map $PINMAP --net $NET > ${IOPLACE_FILE}
-  python3 ${PLACEGEN} --blif $EBLIF --map $CLKMAP -i ${IOPLACE_FILE} > ${PLACE_FILE}
+  ${PYTHON3} ${IOGEN} --pcf $PCF --blif $EBLIF --map $PINMAP --net $NET > ${IOPLACE_FILE}
+  ${PYTHON3} ${PLACEGEN} --blif $EBLIF --map $CLKMAP -i ${IOPLACE_FILE} > ${PLACE_FILE}
 
   # EOS-S3 IOMUX configuration
   if [[ "$DEVICE" =~ ^(ql-eos-s3)$ ]]; then
@@ -86,9 +88,9 @@ elif [[ "$DEVICE" =~ ^(ql-.*)$ ]]; then
       IOMUX_OPENOCD="${PROJECT%.*}_iomux.openocd"
       IOMUX_BINARY="${PROJECT%.*}_iomux.bin"
 
-      python3 ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=jlink > ${IOMUX_JLINK}
-      python3 ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=openocd > ${IOMUX_OPENOCD}
-      python3 ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=binary > ${IOMUX_BINARY}
+      ${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=jlink > ${IOMUX_JLINK}
+      ${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=openocd > ${IOMUX_OPENOCD}
+      ${PYTHON3} ${IOMUXGEN} --eblif $EBLIF --pcf $PCF --map $PINMAP --output-format=binary > ${IOMUX_BINARY}
   fi
 
 else

f4pga/wrappers/sh/quicklogic/generate_libfile.f4pga.sh

@@ -34,7 +34,7 @@ fi
 ARCH_DIR="$F4PGA_ENV_SHARE"/arch/${DEVICE_1}_${DEVICE_1}
 PINMAP_XML=${ARCH_DIR}/${PINMAPXML}
 
-python3 "$F4PGA_ENV_BIN"/python/create_lib.py \
+`which python3` "$F4PGA_ENV_BIN"/python/create_lib.py \
   -n ${DEV}_0P72_SSM40 \
   -m fpga_top \
   -c $PART \

f4pga/wrappers/sh/quicklogic/pack.f4pga.sh

@@ -20,7 +20,7 @@ set -e
 
 if [ -z $VPRPATH ]; then
   export VPRPATH="$F4PGA_ENV_BIN"
-  export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
+  export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh

f4pga/wrappers/sh/quicklogic/place.f4pga.sh

@@ -20,7 +20,7 @@ set -e
 
 if [ -z $VPRPATH ]; then
   export VPRPATH="$F4PGA_ENV_BIN"
-  export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
+  export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh

f4pga/wrappers/sh/quicklogic/repack.f4pga.sh

@@ -32,7 +32,7 @@ DESIGN=${EBLIF/.eblif/}
 
 export PYTHONPATH=$F4PGA_ENV_BIN/python:$PYTHONPATH
 
-python3 "$F4PGA_ENV_BIN"/python/repacker/repack.py \
+`which python3` "$F4PGA_ENV_BIN"/python/repacker/repack.py \
   --vpr-arch ${ARCH_DEF} \
   --repacking-rules ${ARCH_DIR}/${DEVICE_1}.repacking_rules.json \
   $JSON_ARGS \

f4pga/wrappers/sh/quicklogic/route.f4pga.sh

@@ -20,7 +20,7 @@ set -e
 
 if [ -z $VPRPATH ]; then
   export VPRPATH="$F4PGA_ENV_BIN"
-  export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
+  export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh

f4pga/wrappers/sh/quicklogic/synth.f4pga.sh

@@ -178,6 +178,6 @@ if [ ! -z "${YOSYS_COMMANDS}" ]; then
   YOSYS_SCRIPT="$YOSYS_COMMANDS; $YOSYS_SCRIPT"
 fi
 
-yosys -p "${YOSYS_SCRIPT}" -l $LOG
-python3 ${SPLIT_INOUTS} -i ${OUT_JSON} -o ${SYNTH_JSON}
-yosys -p "read_json $SYNTH_JSON; tcl ${CONV_TCL_PATH}"
+`which yosys` -p "${YOSYS_SCRIPT}" -l $LOG
+`which python3` ${SPLIT_INOUTS} -i ${OUT_JSON} -o ${SYNTH_JSON}
+`which yosys` -p "read_json $SYNTH_JSON; tcl ${CONV_TCL_PATH}"

f4pga/wrappers/sh/quicklogic/vpr_common.f4pga.sh

@@ -184,7 +184,7 @@ function run_vpr {
           SDC_OPTIONS="--sdc_file $SDC"
      fi
 
-     vpr ${ARCH_DEF} \
+     `which vpr` ${ARCH_DEF} \
          ${EBLIF} \
          --read_rr_graph ${RR_GRAPH} \
          --device ${DEVICE_NAME} \
@@ -200,7 +200,7 @@ function run_vpr {
 function run_genfasm {
      set -e
 
-     genfasm ${ARCH_DEF} \
+     `which genfasm` ${ARCH_DEF} \
          ${EBLIF} \
          --device ${DEVICE_NAME} \
          ${VPR_OPTIONS} \

f4pga/wrappers/sh/quicklogic/write_binary.f4pga.sh

@@ -18,11 +18,7 @@
 
 set -e
 
-PYTHON3=`which python3`
-
 source $(dirname "$(readlink -f "$BASH_SOURCE")")/env
 
-BIT2BINARY="${PYTHON3} -m quicklogic_fasm.bitstream_to_binary"
-
 echo "Converting bitstream to flashable binary format"
-${BIT2BINARY} $@
+`which python3` -m quicklogic_fasm.bitstream_to_binary $@

f4pga/wrappers/sh/quicklogic/write_bitheader.f4pga.sh

@@ -18,11 +18,7 @@
 
 set -e
 
-PYTHON3=`which python3`
-
 source $(dirname "$(readlink -f "$BASH_SOURCE")")/env
 
-BIT2HEADER="${PYTHON3} -m quicklogic_fasm.bitstream_to_header"
-
 echo "Converting bitstream to C Header"
-${BIT2HEADER} $@
+`which python3` -m quicklogic_fasm.bitstream_to_header $@

f4pga/wrappers/sh/quicklogic/write_fasm.f4pga.sh

@@ -20,7 +20,7 @@ set -e
 
 if [ -z $VPRPATH ]; then
   export VPRPATH="$F4PGA_ENV_BIN"
-  export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
+  export PYTHONPATH=${VPRPATH}/python:${PYTHONPATH}
 fi
 
 source $(dirname "$0")/vpr_common.f4pga.sh

f4pga/wrappers/sh/quicklogic/write_jlink.f4pga.sh

@@ -18,11 +18,7 @@
 
 set -e
 
-PYTHON3=`which python3`
-
 source $(dirname "$(readlink -f "$BASH_SOURCE")")/env
 
-BIT2JLINK="${PYTHON3} -m quicklogic_fasm.bitstream_to_jlink"
-
 echo "Converting bitstream to JLink script"
-${BIT2JLINK} $@
+`which python3` -m quicklogic_fasm.bitstream_to_jlink $@

f4pga/wrappers/sh/quicklogic/write_openocd.f4pga.sh

@@ -18,11 +18,7 @@
 
 set -e
 
-PYTHON3=`which python3`
-
 source $(dirname "$(readlink -f "$BASH_SOURCE")")/env
 
-BIT2OPENOCD="${PYTHON3} -m quicklogic_fasm.bitstream_to_openocd"
-
 echo "Converting bitstream to OpenOCD script"
-${BIT2OPENOCD} $@
+`which python3` -m quicklogic_fasm.bitstream_to_openocd $@