docs/flows/f4pga: update yosys website URL
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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@ -134,7 +134,7 @@ Technology mapping in F4PGA toolchain
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.. _Xilinx 7 Series FPGAs Clocking Resources User Guide: https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf#page=38
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.. _Xilinx 7 Series FPGAs Clocking Resources User Guide: https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf#page=38
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.. _VTR FPGA Architecture Description: https://docs.verilogtorouting.org/en/latest/arch/
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.. _VTR FPGA Architecture Description: https://docs.verilogtorouting.org/en/latest/arch/
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.. _techmap section in the Yosys Manual: http://www.clifford.at/yosys/files/yosys_manual.pdf#page=153
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.. _techmap section in the Yosys Manual: http://yosyshq.net/yosys/files/yosys_manual.pdf#page=153
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It is important to understand the connection between the synthesis and
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It is important to understand the connection between the synthesis and
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implementation tools used in the F4PGA toolchain. As mentioned before,
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implementation tools used in the F4PGA toolchain. As mentioned before,
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@ -405,8 +405,8 @@ More information
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Additional information about Yosys can be found on the `Yosys Project Website
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Additional information about Yosys can be found on the `Yosys Project Website
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<http://www.clifford.at/yosys/>`_ , or in `Yosys Manual
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<https://yosyshq.net/yosys/>`_ , or in `Yosys Manual
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<http://www.clifford.at/yosys/files/yosys_manual.pdf>`_. You can also compile
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<http://yosyshq.net/yosys/files/yosys_manual.pdf>`_. You can also compile
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one of the tests described in Getting Started section and watch the log file
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one of the tests described in Getting Started section and watch the log file
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to understand which operations are performed by Yosys.
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to understand which operations are performed by Yosys.
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