docs/flows/f4pga: update yosys website URL

Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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Unai Martinez-Corral 2022-04-05 13:21:12 +02:00
parent 4aed129e6e
commit 59c8424e5f
1 changed files with 3 additions and 3 deletions

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@ -134,7 +134,7 @@ Technology mapping in F4PGA toolchain
.. _Xilinx 7 Series FPGAs Clocking Resources User Guide: https://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf#page=38
.. _VTR FPGA Architecture Description: https://docs.verilogtorouting.org/en/latest/arch/
.. _techmap section in the Yosys Manual: http://www.clifford.at/yosys/files/yosys_manual.pdf#page=153
.. _techmap section in the Yosys Manual: http://yosyshq.net/yosys/files/yosys_manual.pdf#page=153
It is important to understand the connection between the synthesis and
implementation tools used in the F4PGA toolchain. As mentioned before,
@ -405,8 +405,8 @@ More information
----------------
Additional information about Yosys can be found on the `Yosys Project Website
<http://www.clifford.at/yosys/>`_ , or in `Yosys Manual
<http://www.clifford.at/yosys/files/yosys_manual.pdf>`_. You can also compile
<https://yosyshq.net/yosys/>`_ , or in `Yosys Manual
<http://yosyshq.net/yosys/files/yosys_manual.pdf>`_. You can also compile
one of the tests described in Getting Started section and watch the log file
to understand which operations are performed by Yosys.