f4pga/module_runner: import importlib.util explicitly
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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@ -2,6 +2,7 @@
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from contextlib import contextmanager
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import importlib
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import importlib.util
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import os
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from sf_module import Module, ModuleContext, get_mod_metadata
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from sf_common import ResolutionEnv, deep, sfprint
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@ -36,7 +37,7 @@ def get_module(path: str):
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cached = preloaded_modules.get(path)
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if cached:
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return cached.ModuleClass
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mod = import_module_from_path(path)
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preloaded_modules[path] = mod
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@ -53,7 +54,7 @@ class ModRunCtx:
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self.share = share
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self.bin = bin
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self.config = config
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def make_r_env(self):
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return ResolutionEnv(self.config['values'])
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@ -66,7 +67,7 @@ class ModuleFailException(Exception):
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self.module = module
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self.mode = mode
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self.e = e
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def __str__(self) -> str:
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return f'ModuleFailException:\n Module `{self.module}` failed ' \
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f'MODE: \'{self.mode}\'\n\nException `{type(self.e)}`: {self.e}'
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@ -81,11 +82,11 @@ def module_io(module: Module):
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def module_map(module: Module, ctx: ModRunCtx):
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try:
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mod_ctx = ModuleContext(module, ctx.config, ctx.make_r_env(), ctx.share,
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mod_ctx = ModuleContext(module, ctx.config, ctx.make_r_env(), ctx.share,
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ctx.bin)
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except Exception as e:
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raise ModuleFailException(module.name, 'map', e)
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return _realpath_deep(vars(mod_ctx.outputs))
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def module_exec(module: Module, ctx: ModRunCtx):
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@ -94,7 +95,7 @@ def module_exec(module: Module, ctx: ModRunCtx):
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ctx.bin)
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except Exception as e:
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raise ModuleFailException(module.name, 'exec', e)
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sfprint(1, 'Executing module '
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f'`{Style.BRIGHT + module.name + Style.RESET_ALL}`:')
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current_phase = 1
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