f4pga/wrappers/sh/quicklogic: cleanup and adjust
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
This commit is contained in:
Unai Martinez-Corral
parent
6dbdcee076
commit
ac82b068e1
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@ -1,23 +1,22 @@
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#!/bin/bash
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#!/usr/bin/env bash
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set -e
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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if [ -z $VPRPATH ]; then
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export VPRPATH=$(f4pga-env bin)
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export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
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fi
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source ${MYPATH}/env
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source ${VPRPATH}/vpr_common
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parse_args $@
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FIXUP_POST_SYNTHESIS=`realpath ${MYPATH}/python/vpr_fixup_post_synth.py`
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export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_analysis.log
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run_vpr --analysis --gen_post_synthesis_netlist on --verify_file_digests off
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mv vpr_stdout.log analysis.log
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python3 ${FIXUP_POST_SYNTHESIS} \
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python3 $(f4pga-env bin)/python/vpr_fixup_post_synth.py \
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--vlog-in ${TOP}_post_synthesis.v \
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--vlog-out ${TOP}_post_synthesis.v \
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--sdf-in ${TOP}_post_synthesis.sdf \
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@ -1,8 +1,6 @@
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#!/bin/bash
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set -e
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#!/usr/bin/env bash
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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set -e
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OPTS=d:f:r:b:
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LONGOPTS=device:,fasm:,format:,bit:
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@ -16,47 +14,30 @@ BIT=""
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BIT_FORMAT="4byte"
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while true; do
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case "$1" in
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-d|--device)
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DEVICE=$2
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shift 2
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;;
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-f|--fasm)
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FASM=$2
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shift 2
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;;
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-r|--format)
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BIT_FORMAT=$2
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shift 2
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;;
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-b|--bit)
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BIT=$2
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shift 2
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;;
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--)
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break
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;;
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esac
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case "$1" in
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-d|--device) DEVICE=$2; shift 2;;
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-f|--fasm) FASM=$2; shift 2;;
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-r|--format) BIT_FORMAT=$2; shift 2;;
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-b|--bit) BIT=$2; shift 2;;
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--) break;;
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esac
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done
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if [ -z $DEVICE ]; then
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echo "Please provide device name"
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exit 1
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echo "Please provide device name"
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exit 1
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fi
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if [ -z $FASM ]; then
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echo "Please provide an input FASM file name"
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exit 1
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echo "Please provide an input FASM file name"
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exit 1
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fi
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if [ -z $BIT ]; then
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echo "Please provide an output bistream file name"
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exit 1
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echo "Please provide an output bistream file name"
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exit 1
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fi
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QLF_FASM=`which qlf_fasm`
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DB_ROOT=`realpath ${MYPATH}/../share/symbiflow/fasm_database/${DEVICE}`
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${QLF_FASM} --db-root ${DB_ROOT} --format ${BIT_FORMAT} --assemble $FASM $BIT
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DB_ROOT=$(f4pga-env share)/fasm_database/${DEVICE}
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`which qlf_fasm` --db-root ${DB_ROOT} --format ${BIT_FORMAT} --assemble $FASM $BIT
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@ -1,8 +1,6 @@
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#!/bin/bash
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set -e
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#!/usr/bin/env bash
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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set -e
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PCF=$1
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EBLIF=$2
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@ -13,18 +11,26 @@ ARCH_DEF=$6
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CORNER=$7
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if [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]];then
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DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
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PINMAPXML="pinmap_qlf_k4n8_umc22.xml"
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DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
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PINMAPXML="pinmap_qlf_k4n8_umc22.xml"
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elif [[ "$DEVICE" =~ ^(qlf_k6n10_qlf_k6n10)$ ]];then
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DEVICE_1="qlf_k6n10-qlf_k6n10_gf12"
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PINMAPXML="pinmap_qlf_k6n10_gf12.xml"
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DEVICE_1="qlf_k6n10-qlf_k6n10_gf12"
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PINMAPXML="pinmap_qlf_k6n10_gf12.xml"
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else
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DEVICE_1=${DEVICE}
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DEVICE_1=${DEVICE}
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fi
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PINMAP_XML=`realpath ${MYPATH}/../share/symbiflow/arch/${DEVICE_1}_${DEVICE_1}/${PINMAPXML}`
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IOGEN=`realpath ${MYPATH}/python/create_ioplace.py`
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SHARE_DIR_PATH=${SHARE_DIR_PATH:=$(f4pga-env share)}
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PINMAP_XML=`realpath ${SHARE_DIR_PATH}/arch/${DEVICE_1}_${DEVICE_1}/${PINMAPXML}`
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PROJECT=$(basename -- "$EBLIF")
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IOPLACE_FILE="${PROJECT%.*}_io.place"
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python3 ${IOGEN} --pcf $PCF --blif $EBLIF --pinmap_xml $PINMAP_XML --csv_file $PART --net $NET > ${IOPLACE_FILE}
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python3 $(realpath $(f4pga-env bin)/python/create_ioplace.py) \
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--pcf $PCF \
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--blif $EBLIF \
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--pinmap_xml $PINMAP_XML \
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--csv_file $PART \
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--net $NET \
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> ${IOPLACE_FILE}
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@ -1,25 +1,27 @@
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#!/bin/bash
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set -e
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#!/usr/bin/env bash
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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set -e
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PART=$1
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DEVICE=$2
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CORNER=$3
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if [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]];then
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DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
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PINMAPXML="pinmap_qlf_k4n8_umc22.xml"
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INTERFACEXML="interface-mapping_24x24.xml"
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DEV="qlf_k4n8_umc22"
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DEVICE_1="qlf_k4n8-qlf_k4n8_umc22_$CORNER"
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PINMAPXML="pinmap_qlf_k4n8_umc22.xml"
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INTERFACEXML="interface-mapping_24x24.xml"
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DEV="qlf_k4n8_umc22"
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else
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DEVICE_1=${DEVICE}
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DEVICE_1=${DEVICE}
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fi
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ARCH_DIR=`realpath ${MYPATH}/../share/symbiflow/arch/${DEVICE_1}_${DEVICE_1}`
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PINMAP_XML=`realpath ${ARCH_DIR}/${PINMAPXML}`
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INTF_XML=`realpath ${ARCH_DIR}/lib/${INTERFACEXML}`
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CREATE_LIB=`realpath ${MYPATH}/python/create_lib.py`
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ARCH_DIR=$(f4pga-env share)/arch/${DEVICE_1}_${DEVICE_1}
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PINMAP_XML=${ARCH_DIR}/${PINMAPXML}
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python3 ${CREATE_LIB} -n ${DEV}_0P72_SSM40 -m fpga_top -c $PART -x $INTF_XML -l ${DEV}_0P72_SSM40.lib -t ${ARCH_DIR}/lib
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python3 $(f4pga-env bin)/python/create_lib.py \
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-n ${DEV}_0P72_SSM40 \
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-m fpga_top \
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-c $PART \
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-x ${ARCH_DIR}/lib/${INTERFACEXML} \
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-l ${DEV}_0P72_SSM40.lib \
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-t ${ARCH_DIR}/lib
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@ -1,12 +1,13 @@
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#!/bin/bash
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#!/usr/bin/env bash
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set -e
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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if [ -z $VPRPATH ]; then
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export VPRPATH=$(f4pga-env bin)
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export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
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fi
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source ${MYPATH}/env
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source ${VPRPATH}/vpr_common
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parse_args $@
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export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_pack.log
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@ -1,48 +1,42 @@
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#!/bin/bash
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#!/usr/bin/env bash
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set -e
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MYPATH=`realpath $0`
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MYPATH=`dirname ${MYPATH}`
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source ${MYPATH}/env
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source ${MYPATH}/vpr_common
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if [ -z $VPRPATH ]; then
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export VPRPATH=$(f4pga-env bin)
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export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
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fi
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source ${VPRPATH}/vpr_common
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parse_args $@
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if [ -z $PCF ]; then
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echo "Please provide pcf file name"
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exit 1
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echo "Please provide pcf file name"
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exit 1
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fi
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if [ -z $NET ]; then
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echo "Please provide net file name"
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exit 1
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echo "Please provide net file name"
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exit 1
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fi
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OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_place.log
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PROJECT=$(basename -- "$EBLIF")
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PLACE_FILE="${PROJECT%.*}_constraints.place"
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# Generate IO constraints
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if [ -s $PCF ]; then
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echo "Generating constraints ..."
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symbiflow_generate_constraints $PCF $EBLIF $NET $PART $DEVICE $ARCH_DEF $CORNER
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IOPLACE_FILE="${PROJECT%.*}_io.place"
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PLACE_FILE="${PROJECT%.*}_constraints.place"
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if [ -f ${PLACE_FILE} ]; then
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VPR_PLACE_FILE=${PLACE_FILE}
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else
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VPR_PLACE_FILE=${IOPLACE_FILE}
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fi
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# Make a dummy empty constraint file
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else
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PLACE_FILE="${PROJECT%.*}_constraints.place"
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touch ${PLACE_FILE}
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# Generate IO constraints
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echo "Generating constraints ..."
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symbiflow_generate_constraints $PCF $EBLIF $NET $PART $DEVICE $ARCH_DEF $CORNER
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if [ -f ${PLACE_FILE} ]; then
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VPR_PLACE_FILE=${PLACE_FILE}
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else
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VPR_PLACE_FILE="${PROJECT%.*}_io.place"
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fi
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else
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# Make a dummy empty constraint file
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touch ${PLACE_FILE}
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VPR_PLACE_FILE=${PLACE_FILE}
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fi
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run_vpr --fix_clusters ${VPR_PLACE_FILE} --place
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@ -1,33 +1,31 @@
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#!/bin/bash
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#!/usr/bin/env bash
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set -e
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MYPATH=$(dirname "$(readlink -f "$BASH_SOURCE")")
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BUILDDIR=build
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source ${MYPATH}/env
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source ${VPRPATH}/vpr_common
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source $(f4pga-env bin)/vpr_common
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VERSION="v2.0.1"
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if [ ! -n $1 ]; then
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echo "Please enter a valid command: Refer help ql_symbiflow --help"
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exit 0
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echo "Please enter a valid command: Refer help ql_symbiflow --help"
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exit 0
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elif [[ $1 == "-synth" || $1 == "-compile" ]]; then
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echo -e "----------------- \n"
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echo -e "----------------- \n"
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elif [[ $1 == "-h" || $1 == "--help" ]];then
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echo -e "\nBelow are the supported commands: \n\
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echo -e "\nBelow are the supported commands: \n\
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To synthesize and dump a eblif file:\n\
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\t>ql_symbiflow -synth -src <source_dir path> -d <device> -P <pinmap csv file> -t <top module name> -v <verilog file/files> -p <pcf file>\n\
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To run synthesis, pack, place and route:\n\
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\t>ql_symbiflow -compile -src <source_dir path> -d <device> -P <pinmap csv file> -t <top module name> -v <verilog file/files> -p <pcf file> -P <pinmap csv file> -s <SDC file> \n\
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Device supported:qlf_k4n8" || exit
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elif [[ $1 == "-v" || $1 == "--version" ]];then
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echo "Symbiflow Tool Version : ${VERSION}"
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exit
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echo "Symbiflow Tool Version : ${VERSION}"
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exit
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else
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echo -e "Please provide a valid command : Refer -h/--help\n"
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exit
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echo -e "Please provide a valid command : Refer -h/--help\n"
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exit
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fi
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@ -50,176 +48,141 @@ COMPILE_EXTRA_ARGS=()
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OPT=""
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for arg in $@; do
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case $arg in
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-src|--source)
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OPT="src"
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;;
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-t|--top)
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OPT="top"
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;;
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-v|--verilog)
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OPT="vlog"
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;;
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-d|--device)
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OPT="dev"
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;;
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-p|--pcf)
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OPT="pcf"
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;;
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-P|--part)
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OPT="part"
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;;
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-j|--json)
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OPT="json"
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;;
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-s|--sdc)
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OPT="sdc"
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;;
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-r|--route_type)
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OPT="route"
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;;
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-pnr_corner)
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OPT="pnr_corner"
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;;
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-analysis_corner)
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OPT="analysis_corner"
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;;
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-dump)
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OPT="dump"
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;;
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-synth|-compile)
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OPT="synth"
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;;
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-y|+incdir+*|+libext+*|+define+*)
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OPT="compile_xtra"
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;;
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-f)
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OPT="options_file"
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;;
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-h|--help)
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exit 0
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;;
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*)
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case $OPT in
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"src")
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SOURCE=$arg
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OPT=""
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;;
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"top")
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TOP=$arg
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OPT=""
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;;
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"vlog")
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VERILOG_FILES+="$arg "
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;;
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"dev")
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DEVICE=$arg
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OPT=""
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;;
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"pcf")
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PCF=$arg
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OPT=""
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;;
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"part")
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PART=$arg
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OPT=""
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;;
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"json")
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JSON=$arg
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OPT=""
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;;
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"sdc")
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SDC=$arg
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OPT=""
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;;
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"route")
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ROUTE_FLAG0="$arg"
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ROUTE_FLAG0="${ROUTE_FLAG0,,}"
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OPT=""
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;;
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"pnr_corner")
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PNR_CORNER=$arg
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OPT=""
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;;
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"analysis_corner")
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ANALYSIS_CORNER=$arg
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OPT=""
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;;
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"dump")
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OUT+="$arg "
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;;
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"compile_xtra")
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;;
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"options_file")
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COMPILE_EXTRA_ARGS+=("-f \"`realpath $arg`\" ")
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;;
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*)
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echo "Refer help for more details: ql_symbiflow -h "
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exit 1
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;;
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esac
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case $arg in
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-src|--source) OPT="src" ;;
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-t|--top) OPT="top" ;;
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-v|--verilog) OPT="vlog" ;;
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-d|--device) OPT="dev" ;;
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-p|--pcf) OPT="pcf" ;;
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-P|--part) OPT="part" ;;
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-j|--json) OPT="json" ;;
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-s|--sdc) OPT="sdc" ;;
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-r|--route_type) OPT="route" ;;
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-pnr_corner) OPT="pnr_corner" ;;
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-analysis_corner) OPT="analysis_corner" ;;
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-dump) OPT="dump" ;;
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-synth|-compile) OPT="synth" ;;
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-y|+incdir+*|+libext+*|+define+*) OPT="compile_xtra" ;;
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-f) OPT="options_file" ;;
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-h|--help) exit 0 ;;
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*)
|
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case $OPT in
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src)
|
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SOURCE=$arg
|
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OPT=""
|
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;;
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top)
|
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TOP=$arg
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OPT=""
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;;
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vlog)
|
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VERILOG_FILES+="$arg "
|
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;;
|
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dev)
|
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DEVICE=$arg
|
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OPT=""
|
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;;
|
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pcf)
|
||||
PCF=$arg
|
||||
OPT=""
|
||||
;;
|
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part)
|
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PART=$arg
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||||
OPT=""
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;;
|
||||
json)
|
||||
JSON=$arg
|
||||
OPT=""
|
||||
;;
|
||||
sdc)
|
||||
SDC=$arg
|
||||
OPT=""
|
||||
;;
|
||||
route)
|
||||
ROUTE_FLAG0="$arg"
|
||||
ROUTE_FLAG0="${ROUTE_FLAG0,,}"
|
||||
OPT=""
|
||||
;;
|
||||
pnr_corner)
|
||||
PNR_CORNER=$arg
|
||||
OPT=""
|
||||
;;
|
||||
analysis_corner)
|
||||
ANALYSIS_CORNER=$arg
|
||||
OPT=""
|
||||
;;
|
||||
dump)
|
||||
OUT+="$arg "
|
||||
;;
|
||||
compile_xtra)
|
||||
;;
|
||||
options_file)
|
||||
COMPILE_EXTRA_ARGS+=("-f \"`realpath $arg`\" ")
|
||||
;;
|
||||
*)
|
||||
echo "Refer help for more details: ql_symbiflow -h "
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
|
||||
if [ "$OPT" == "compile_xtra" ]; then
|
||||
COMPILE_EXTRA_ARGS+=($arg)
|
||||
fi
|
||||
|
||||
;;
|
||||
esac
|
||||
if [ "$OPT" == "compile_xtra" ]; then
|
||||
COMPILE_EXTRA_ARGS+=($arg)
|
||||
fi
|
||||
done
|
||||
|
||||
case ${DEVICE} in
|
||||
qlf_k4n8)
|
||||
DEVICE="${DEVICE}_${DEVICE}"
|
||||
FAMILY="qlf_k4n8"
|
||||
;;
|
||||
ql-eos-s3)
|
||||
DEVICE="${DEVICE}"
|
||||
FAMILY="pp3"
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported device '${DEVICE}'"
|
||||
exit 1
|
||||
;;
|
||||
qlf_k4n8)
|
||||
DEVICE="${DEVICE}_${DEVICE}"
|
||||
FAMILY="qlf_k4n8"
|
||||
;;
|
||||
ql-eos-s3)
|
||||
DEVICE="${DEVICE}"
|
||||
FAMILY="pp3"
|
||||
;;
|
||||
*)
|
||||
echo "Unsupported device '${DEVICE}'"
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
|
||||
##### Check if the source directory exists #####
|
||||
## Check if the source directory exists
|
||||
if [[ $1 == "-h" || $1 == "--help" ]];then
|
||||
exit 1
|
||||
exit 1
|
||||
else
|
||||
if [ -z "$SOURCE" ];then
|
||||
if [ -z "$SOURCE" ];then
|
||||
SOURCE=$PWD
|
||||
elif [ $SOURCE == "." ];then
|
||||
elif [ $SOURCE == "." ];then
|
||||
SOURCE=$PWD
|
||||
elif [ ! -d "$SOURCE" ];then
|
||||
elif [ ! -d "$SOURCE" ];then
|
||||
echo "Directory path $SOURCE DOES NOT exists. Please add absolute path"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
if [[ $1 == "-h" || $1 == "--help" ]];then
|
||||
exit 0
|
||||
else
|
||||
if [ -f $SOURCE/v_list_tmp ];then
|
||||
rm -f $SOURCE/v_list_tmp
|
||||
fi
|
||||
if [ $VERILOG_FILES == "*.v" ];then
|
||||
VERILOG_FILES=`cd ${SOURCE};ls *.v`
|
||||
fi
|
||||
echo "$VERILOG_FILES" >${SOURCE}/v_list
|
||||
fi
|
||||
|
||||
if [[ $1 == "-h" || $1 == "--help" ]];then
|
||||
exit 0
|
||||
else
|
||||
if [ -f $SOURCE/v_list_tmp ];then
|
||||
rm -f $SOURCE/v_list_tmp
|
||||
fi
|
||||
if [ $VERILOG_FILES == "*.v" ];then
|
||||
VERILOG_FILES=`cd ${SOURCE};ls *.v`
|
||||
fi
|
||||
echo "$VERILOG_FILES" >${SOURCE}/v_list
|
||||
fi
|
||||
|
||||
##### Validate the verlog source files #####
|
||||
|
||||
if [ ${#VERILOG_FILES[@]} -eq 0 ]; then
|
||||
if [[ $1 != "-h" || $1 != "--help" ]];then
|
||||
echo "Please provide at least one Verilog file"
|
||||
exit 1
|
||||
fi
|
||||
else
|
||||
echo "verilog files: $VERILOG_FILES"
|
||||
echo $VERILOG_FILES >${SOURCE}/v_list
|
||||
sed '/^$/d' $SOURCE/v_list > $SOURCE/f_list_temp
|
||||
VERILOG_FILES=`cat $SOURCE/f_list_temp`
|
||||
fi
|
||||
## Validate the verlog source files
|
||||
if [ ${#VERILOG_FILES[@]} -eq 0 ]; then
|
||||
if [[ $1 != "-h" || $1 != "--help" ]];then
|
||||
echo "Please provide at least one Verilog file"
|
||||
exit 1
|
||||
fi
|
||||
else
|
||||
echo "verilog files: $VERILOG_FILES"
|
||||
echo $VERILOG_FILES >${SOURCE}/v_list
|
||||
sed '/^$/d' $SOURCE/v_list > $SOURCE/f_list_temp
|
||||
VERILOG_FILES=`cat $SOURCE/f_list_temp`
|
||||
fi
|
||||
fi
|
||||
|
||||
if [[ $1 == "-compile" || $1 == "-post_verilog" ]]; then
|
||||
|
|
@ -237,7 +200,7 @@ if [[ $1 == "-compile" || $1 == "-post_verilog" ]]; then
|
|||
echo "DEVICE name is missing. Refer -h/--help"
|
||||
exit 1
|
||||
elif ! [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]]; then
|
||||
echo "Invalid Device name, supported qlf_k4n8"
|
||||
echo "Invalid Device name, supported qlf_k4n8"
|
||||
exit 1
|
||||
fi
|
||||
if [ -z "$TOP" ]; then
|
||||
|
|
@ -246,68 +209,67 @@ if [[ $1 == "-compile" || $1 == "-post_verilog" ]]; then
|
|||
fi
|
||||
if [[ "$DEVICE" =~ ^(qlf_k4n8_qlf_k4n8)$ ]]; then
|
||||
if [ -z "$PART" ]; then
|
||||
if [ -n "$PCF" ];then
|
||||
echo "Error: pcf file cannot be used without declaring PINMAP CSV file"
|
||||
exit 1
|
||||
fi
|
||||
if [ -n "$PCF" ];then
|
||||
echo "Error: pcf file cannot be used without declaring PINMAP CSV file"
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
if [ -z "$ROUTE_FLAG0" ]; then
|
||||
MAX_CRITICALITY="0.0"
|
||||
elif ! [[ "$ROUTE_FLAG0" =~ ^(timing|congestion)$ ]]; then
|
||||
echo "Invalid option name, supported timing/congestion"
|
||||
exit 1
|
||||
else
|
||||
if [ "$ROUTE_FLAG0" == "congestion" ]; then
|
||||
MAX_CRITICALITY="0.99"
|
||||
else
|
||||
MAX_CRITICALITY="0.0"
|
||||
fi
|
||||
fi
|
||||
if [ -z "$ROUTE_FLAG0" ]; then
|
||||
MAX_CRITICALITY="0.0"
|
||||
elif ! [[ "$ROUTE_FLAG0" =~ ^(timing|congestion)$ ]]; then
|
||||
echo "Invalid option name, supported timing/congestion"
|
||||
exit 1
|
||||
else
|
||||
if [ "$ROUTE_FLAG0" == "congestion" ]; then
|
||||
MAX_CRITICALITY="0.99"
|
||||
else
|
||||
MAX_CRITICALITY="0.0"
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
if [ ! -z "$SOURCE" ];then
|
||||
if [ ! -d $SOURCE/$BUILDDIR ]; then
|
||||
mkdir -p $SOURCE/$BUILDDIR
|
||||
fi
|
||||
if [ ! -z "$SOURCE" ]; then
|
||||
if [ ! -d $SOURCE/$BUILDDIR ]; then
|
||||
mkdir -p $SOURCE/$BUILDDIR
|
||||
fi
|
||||
fi
|
||||
|
||||
if [ ! -z "$OUT" ];then
|
||||
OUT_ARR=($OUT)
|
||||
if [ ! -z "$OUT" ]; then
|
||||
OUT_ARR=($OUT)
|
||||
fi
|
||||
|
||||
for item in $VERILOG_FILES;
|
||||
do
|
||||
if ! [ -f $SOURCE/$item ]; then
|
||||
echo "$item: verilog file does not exists at : $SOURCE"
|
||||
exit 1
|
||||
elif [[ $item =~ ^/ ]]; then
|
||||
echo "$item \\" >>$SOURCE/v_list_tmp
|
||||
else
|
||||
echo "\${current_dir}/$item \\" >>$SOURCE/v_list_tmp
|
||||
fi
|
||||
for item in $VERILOG_FILES; do
|
||||
if ! [ -f $SOURCE/$item ]; then
|
||||
echo "$item: verilog file does not exists at : $SOURCE"
|
||||
exit 1
|
||||
elif [[ $item =~ ^/ ]]; then
|
||||
echo "$item \\" >>$SOURCE/v_list_tmp
|
||||
else
|
||||
echo "\${current_dir}/$item \\" >>$SOURCE/v_list_tmp
|
||||
fi
|
||||
done
|
||||
|
||||
if [ -f "$SOURCE/v_list_tmp" ]; then
|
||||
truncate -s-2 "$SOURCE/v_list_tmp"
|
||||
VERILOG_LIST=`cat ${SOURCE}/v_list_tmp`
|
||||
truncate -s-2 "$SOURCE/v_list_tmp"
|
||||
VERILOG_LIST=`cat ${SOURCE}/v_list_tmp`
|
||||
fi
|
||||
|
||||
# FIXME: Some devices do not have fasm2bels yet
|
||||
RUN_TILL=""
|
||||
if [[ "$DEVICE" =~ ^(qlf_k4n8.*)$ ]]; then
|
||||
HAVE_FASM2BELS=0
|
||||
RUN_TILL="bit"
|
||||
HAVE_FASM2BELS=0
|
||||
RUN_TILL="bit"
|
||||
else
|
||||
HAVE_FASM2BELS=1
|
||||
RUN_TILL="route"
|
||||
HAVE_FASM2BELS=1
|
||||
RUN_TILL="route"
|
||||
fi
|
||||
|
||||
# For some devices do repacking between place and route
|
||||
if [[ "$DEVICE" =~ ^(qlf_k4n8.*)$ ]]; then
|
||||
TOP_FINAL=${TOP}.repacked
|
||||
TOP_FINAL=${TOP}.repacked
|
||||
else
|
||||
TOP_FINAL=${TOP}
|
||||
TOP_FINAL=${TOP}
|
||||
fi
|
||||
|
||||
export PCF_FILE=$PCF
|
||||
|
|
@ -315,37 +277,38 @@ export JSON=$JSON
|
|||
export TOP_F=$TOP
|
||||
export PINMAP_FILE=$PINMAPCSV
|
||||
export MAX_CRITICALITY=$MAX_CRITICALITY
|
||||
##### Create Makefile #####
|
||||
|
||||
## Create Makefile
|
||||
|
||||
if [[ $SOURCE =~ ^/ ]]; then
|
||||
CURR_DIR="${SOURCE}"
|
||||
CURR_DIR="${SOURCE}"
|
||||
else
|
||||
CURR_DIR="${PWD}/${SOURCE}"
|
||||
CURR_DIR="${PWD}/${SOURCE}"
|
||||
fi
|
||||
|
||||
if [ -n "$PART" ]; then
|
||||
if [[ -f $SOURCE/$PART ]];then
|
||||
CSV_PATH=`realpath $SOURCE/$PART`
|
||||
elif [[ -f $PART ]];then
|
||||
CSV_PATH=`realpath $PART`
|
||||
else
|
||||
echo "invalid csv file/path"
|
||||
exit 1
|
||||
fi
|
||||
if [[ -f $SOURCE/$PART ]];then
|
||||
CSV_PATH=`realpath $SOURCE/$PART`
|
||||
elif [[ -f $PART ]];then
|
||||
CSV_PATH=`realpath $PART`
|
||||
else
|
||||
echo "invalid csv file/path"
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
|
||||
if [[ -f $SOURCE/$JSON ]];then
|
||||
JSON_PATH=`realpath $SOURCE/$JSON`
|
||||
JSON_PATH=`realpath $SOURCE/$JSON`
|
||||
elif [[ -f $JSON ]];then
|
||||
JSON_PATH=`realpath $JSON`
|
||||
JSON_PATH=`realpath $JSON`
|
||||
else
|
||||
JSON_PATH=""
|
||||
JSON_PATH=""
|
||||
fi
|
||||
|
||||
if [[ -f $SOURCE/$PCF ]];then
|
||||
PCF_PATH=`realpath $SOURCE/$PCF`
|
||||
PCF_PATH=`realpath $SOURCE/$PCF`
|
||||
elif [[ -f $PCF ]];then
|
||||
PCF_PATH=`realpath $PCF`
|
||||
PCF_PATH=`realpath $PCF`
|
||||
fi
|
||||
|
||||
export PART=${CSV_PATH}
|
||||
|
|
@ -356,30 +319,30 @@ MAKE_FILE=${CURR_DIR}/Makefile.symbiflow
|
|||
LOG_FILE=${CURR_DIR}/${BUILDDIR}/${TOP}.log
|
||||
|
||||
if [ -f "$SOURCE"/$PCF_FILE ];then
|
||||
PCF_MAKE="\${current_dir}/$PCF_FILE"
|
||||
PCF_MAKE="\${current_dir}/$PCF_FILE"
|
||||
else
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.pcf
|
||||
PCF_MAKE="\${current_dir}/build/${TOP}_dummy.pcf"
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.pcf
|
||||
PCF_MAKE="\${current_dir}/build/${TOP}_dummy.pcf"
|
||||
fi
|
||||
|
||||
PROCESS_SDC=`realpath ${MYPATH}/python/process_sdc_constraints.py`
|
||||
PROCESS_SDC=$(realpath $(f4pga-env bin)/python/process_sdc_constraints.py)
|
||||
if ! [ -z "$SDC" ]; then
|
||||
if ! [ -f "$SOURCE"/$SDC ];then
|
||||
echo "The sdc file: $SDC is missing at: $SOURCE"
|
||||
exit 1
|
||||
else
|
||||
SDC_MAKE="$SOURCE/$SDC"
|
||||
fi
|
||||
if ! [ -f "$SOURCE"/$SDC ];then
|
||||
echo "The sdc file: $SDC is missing at: $SOURCE"
|
||||
exit 1
|
||||
else
|
||||
SDC_MAKE="$SOURCE/$SDC"
|
||||
fi
|
||||
else
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.sdc
|
||||
SDC_MAKE="\${current_dir}/build/${TOP}_dummy.sdc"
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.sdc
|
||||
SDC_MAKE="\${current_dir}/build/${TOP}_dummy.sdc"
|
||||
fi
|
||||
|
||||
if ! [ -z "$CSV_PATH" ]; then
|
||||
CSV_MAKE=$CSV_PATH
|
||||
CSV_MAKE=$CSV_PATH
|
||||
else
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.csv
|
||||
CSV_MAKE="\${current_dir}/build/${TOP}_dummy.csv"
|
||||
touch ${CURR_DIR}/build/${TOP}_dummy.csv
|
||||
CSV_MAKE="\${current_dir}/build/${TOP}_dummy.csv"
|
||||
fi
|
||||
|
||||
echo -e ".PHONY:\${BUILDDIR}\n
|
||||
|
|
@ -459,25 +422,20 @@ clean:\n\
|
|||
rm -rf \${BUILDDIR}\n\
|
||||
" >>$MAKE_FILE
|
||||
|
||||
#### Remove temporary files #####
|
||||
## Remove temporary files
|
||||
rm -f $SOURCE/f_list_temp $SOURCE/v_list_tmp $SOURCE/v_list
|
||||
|
||||
##### Make file Targets #####
|
||||
## Make file Targets
|
||||
if [ $1 == "-synth" ]; then
|
||||
echo -e "Performing Synthesis "
|
||||
cd $SOURCE;make -f Makefile.symbiflow ${BUILDDIR}/${TOP}.eblif || exit
|
||||
elif [[ ! -z "$OUT" && $1 == "-compile" ]];then
|
||||
if [[ " ${OUT_ARR[@]} " =~ " post_verilog " ]];then
|
||||
cd $SOURCE;make -f Makefile.symbiflow ${BUILDDIR}/${TOP}.post_v || exit
|
||||
fi
|
||||
if [[ " ${OUT_ARR[@]} " =~ " post_verilog " ]];then
|
||||
cd $SOURCE;make -f Makefile.symbiflow ${BUILDDIR}/${TOP}.post_v || exit
|
||||
fi
|
||||
else
|
||||
if [ $1 == "-compile" ]; then
|
||||
echo -e "Running Synth->Pack->Place->Route->FASM->bitstream"
|
||||
cd $SOURCE;make -f Makefile.symbiflow ${BUILDDIR}/${TOP}.${RUN_TILL} || exit
|
||||
echo -e "Running Synth->Pack->Place->Route->FASM->bitstream"
|
||||
cd $SOURCE;make -f Makefile.symbiflow ${BUILDDIR}/${TOP}.${RUN_TILL} || exit
|
||||
fi
|
||||
fi
|
||||
|
||||
|
||||
###############################################################################################
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,32 +1,23 @@
|
|||
#!/bin/bash
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
MYPATH=`realpath $0`
|
||||
MYPATH=`dirname ${MYPATH}`
|
||||
if [ -z $VPRPATH ]; then
|
||||
export VPRPATH=$(f4pga-env bin)
|
||||
export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
|
||||
fi
|
||||
|
||||
source ${MYPATH}/env
|
||||
source ${VPRPATH}/vpr_common
|
||||
|
||||
parse_args $@
|
||||
|
||||
REPACK=`realpath ${MYPATH}/python/repacker/repack.py`
|
||||
|
||||
DESIGN=${EBLIF/.eblif/}
|
||||
RULES=${ARCH_DIR}/${DEVICE_1}.repacking_rules.json
|
||||
|
||||
JSON_ARGS=
|
||||
if [ ! -z "${JSON}" ]; then
|
||||
JSON_ARGS="--json-constraints ${JSON}"
|
||||
fi
|
||||
[ ! -z "${JSON}" ] && JSON_ARGS="--json-constraints ${JSON}" || JSON_ARGS=
|
||||
[ ! -z "${PCF_PATH}" ] && PCF_ARGS="--pcf-constraints ${PCF_PATH}" || PCF_ARGS=
|
||||
|
||||
PCF_ARGS=
|
||||
if [ ! -z "${PCF_PATH}" ]; then
|
||||
PCF_ARGS="--pcf-constraints ${PCF_PATH}"
|
||||
fi
|
||||
|
||||
python3 ${REPACK} \
|
||||
python3 $(f4pga-env bin)/python/repacker/repack.py \
|
||||
--vpr-arch ${ARCH_DEF} \
|
||||
--repacking-rules ${RULES} \
|
||||
--repacking-rules ${ARCH_DIR}/${DEVICE_1}.repacking_rules.json \
|
||||
$JSON_ARGS \
|
||||
$PCF_ARGS \
|
||||
--eblif-in ${DESIGN}.eblif \
|
||||
|
|
|
|||
|
|
@ -1,15 +1,16 @@
|
|||
#!/bin/bash
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
MYPATH=`realpath $0`
|
||||
MYPATH=`dirname ${MYPATH}`
|
||||
if [ -z $VPRPATH ]; then
|
||||
export VPRPATH=$(f4pga-env bin)
|
||||
export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
|
||||
fi
|
||||
|
||||
source ${MYPATH}/env
|
||||
source ${VPRPATH}/vpr_common
|
||||
|
||||
parse_args $@
|
||||
|
||||
export OUR_NOISY_WARNINGS=noisy_warnings-${DEVICE}_pack.log
|
||||
export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_pack.log
|
||||
|
||||
run_vpr --route
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
#!/bin/bash
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
MYPATH=`realpath $0`
|
||||
MYPATH=`dirname ${MYPATH}`
|
||||
|
||||
SPLIT_INOUTS=`realpath ${MYPATH}/python/split_inouts.py`
|
||||
CONVERT_OPTS=`realpath ${MYPATH}/python/convert_compile_opts.py`
|
||||
export SHARE_DIR_PATH=${SHARE_DIR_PATH:=$(f4pga-env share)}
|
||||
VPRPATH=${VPRPATH:=$(f4pga-env bin)}
|
||||
SPLIT_INOUTS=`realpath ${VPRPATH}/python/split_inouts.py`
|
||||
CONVERT_OPTS=`realpath ${VPRPATH}/python/convert_compile_opts.py`
|
||||
|
||||
print_usage () {
|
||||
echo "Usage: symbiflow_synth -v|--verilog <Verilog file list>"
|
||||
|
|
@ -101,16 +101,16 @@ if [ -z ${FAMILY} ]; then
|
|||
fi
|
||||
|
||||
if [ ${#VERILOG_FILES[@]} -eq 0 ]; then
|
||||
echo "Please provide at least one Verilog file"
|
||||
exit 1
|
||||
echo "Please provide at least one Verilog file"
|
||||
exit 1
|
||||
fi
|
||||
|
||||
PINMAPCSV="pinmap_${PART}.csv"
|
||||
|
||||
export TECHMAP_PATH=`realpath ${MYPATH}/../share/symbiflow/techmaps/${FAMILY}`
|
||||
export TECHMAP_PATH="${SHARE_DIR_PATH}/techmaps/${FAMILY}"
|
||||
|
||||
SYNTH_TCL_PATH=`realpath ${MYPATH}/../share/symbiflow/scripts/${FAMILY}/synth.tcl`
|
||||
CONV_TCL_PATH=`realpath ${MYPATH}/../share/symbiflow/scripts/${FAMILY}/conv.tcl`
|
||||
SYNTH_TCL_PATH="${SHARE_DIR_PATH}/scripts/${FAMILY}/synth.tcl"
|
||||
CONV_TCL_PATH="${SHARE_DIR_PATH}/scripts/${FAMILY}/conv.tcl"
|
||||
|
||||
export USE_ROI="FALSE"
|
||||
export OUT_JSON=$TOP.json
|
||||
|
|
@ -123,24 +123,24 @@ if [ -s $PCF ]; then
|
|||
export PCF_FILE=$PCF
|
||||
fi
|
||||
|
||||
DEVICE_PATH=`realpath ${MYPATH}/../share/symbiflow/arch/${DEVICE}_${DEVICE}`
|
||||
DEVICE_PATH="${SHARE_DIR_PATH}/arch/${DEVICE}_${DEVICE}"
|
||||
export PINMAP_FILE=${DEVICE_PATH}/${PINMAPCSV}
|
||||
if [ -d "${DEVICE_PATH}/cells" ]; then
|
||||
export DEVICE_CELLS_SIM=`find ${DEVICE_PATH}/cells -name "*_sim.v"`
|
||||
export DEVICE_CELLS_MAP=`find ${DEVICE_PATH}/cells -name "*_map.v"`
|
||||
export DEVICE_CELLS_SIM=`find ${DEVICE_PATH}/cells -name "*_sim.v"`
|
||||
export DEVICE_CELLS_MAP=`find ${DEVICE_PATH}/cells -name "*_map.v"`
|
||||
else
|
||||
# pp3 family has different directory naming scheme
|
||||
# the are named as ${DEVICE}_${PACKAGE}
|
||||
# ${PACKAGE} is not known because it is not passed down in add_binary_toolchain_test
|
||||
DEVICE_PATH=$(find $(realpath ${MYPATH}/../share/symbiflow/arch/) -type d -name "${DEVICE}*")
|
||||
export PINMAP_FILE=${DEVICE_PATH}/${PINMAPCSV}
|
||||
if [ -d "${DEVICE_PATH}/cells" ]; then
|
||||
export DEVICE_CELLS_SIM=`find ${DEVICE_PATH}/cells -name "*_sim.v"`
|
||||
export DEVICE_CELLS_MAP=`find ${DEVICE_PATH}/cells -name "*_map.v"`
|
||||
else
|
||||
export DEVICE_CELLS_SIM=
|
||||
export DEVICE_CELLS_MAP=
|
||||
fi
|
||||
# pp3 family has different directory naming scheme
|
||||
# the are named as ${DEVICE}_${PACKAGE}
|
||||
# ${PACKAGE} is not known because it is not passed down in add_binary_toolchain_test
|
||||
DEVICE_PATH=$(find $(realpath ${SHARE_DIR_PATH}/arch/) -type d -name "${DEVICE}*")
|
||||
export PINMAP_FILE=${DEVICE_PATH}/${PINMAPCSV}
|
||||
if [ -d "${DEVICE_PATH}/cells" ]; then
|
||||
export DEVICE_CELLS_SIM=`find ${DEVICE_PATH}/cells -name "*_sim.v"`
|
||||
export DEVICE_CELLS_MAP=`find ${DEVICE_PATH}/cells -name "*_map.v"`
|
||||
else
|
||||
export DEVICE_CELLS_SIM=
|
||||
export DEVICE_CELLS_MAP=
|
||||
fi
|
||||
fi
|
||||
|
||||
YOSYS_COMMANDS=`echo ${EXTRA_ARGS[*]} | python3 ${CONVERT_OPTS}`
|
||||
|
|
@ -151,11 +151,11 @@ LOG=${TOP}_synth.log
|
|||
YOSYS_SCRIPT="tcl ${SYNTH_TCL_PATH}"
|
||||
|
||||
for f in ${VERILOG_FILES[*]}; do
|
||||
YOSYS_SCRIPT="read_verilog ${f}; $YOSYS_SCRIPT"
|
||||
YOSYS_SCRIPT="read_verilog ${f}; $YOSYS_SCRIPT"
|
||||
done
|
||||
|
||||
if [ ! -z "${YOSYS_COMMANDS}" ]; then
|
||||
YOSYS_SCRIPT="$YOSYS_COMMANDS; $YOSYS_SCRIPT"
|
||||
YOSYS_SCRIPT="$YOSYS_COMMANDS; $YOSYS_SCRIPT"
|
||||
fi
|
||||
|
||||
yosys -p "${YOSYS_SCRIPT}" -l $LOG
|
||||
|
|
|
|||
|
|
@ -1,16 +1,17 @@
|
|||
#!/bin/bash
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
MYPATH=`realpath $0`
|
||||
MYPATH=`dirname ${MYPATH}`
|
||||
if [ -z $VPRPATH ]; then
|
||||
export VPRPATH=$(f4pga-env bin)
|
||||
export PYTHONPATH=${VPRPATH}/python:${VPRPATH}/python/prjxray:${PYTHONPATH}
|
||||
fi
|
||||
|
||||
source ${MYPATH}/env
|
||||
source ${VPRPATH}/vpr_common
|
||||
|
||||
parse_args "$@"
|
||||
|
||||
TOP="${EBLIF%.*}"
|
||||
FASM_EXTRA=${TOP}_fasm_extra.fasm
|
||||
FASM_EXTRA="${TOP}_fasm_extra.fasm"
|
||||
|
||||
export OUT_NOISY_WARNINGS=noisy_warnings-${DEVICE}_fasm.log
|
||||
|
||||
|
|
@ -18,9 +19,9 @@ run_genfasm
|
|||
|
||||
echo "FASM extra: $FASM_EXTRA"
|
||||
if [ -f $FASM_EXTRA ]; then
|
||||
echo "writing final fasm"
|
||||
cat ${TOP}.fasm $FASM_EXTRA > tmp.fasm
|
||||
mv tmp.fasm ${TOP}.fasm
|
||||
echo "writing final fasm"
|
||||
cat ${TOP}.fasm $FASM_EXTRA > tmp.fasm
|
||||
mv tmp.fasm ${TOP}.fasm
|
||||
fi
|
||||
|
||||
mv vpr_stdout.log fasm.log
|
||||
|
|
|
|||
Loading…
Reference in New Issue