Update place module with path resolution that makes more sense

Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
This commit is contained in:
Krzysztof Boronski 2022-08-02 07:17:47 -05:00 committed by Unai Martinez-Corral
parent 831492aa0d
commit ee1dace73c
1 changed files with 10 additions and 16 deletions

View File

@ -24,11 +24,8 @@ from f4pga.flows.common import vpr_specific_values, vpr as common_vpr, VprArgs,
from f4pga.flows.module import Module, ModuleContext from f4pga.flows.module import Module, ModuleContext
def default_output_name(place_constraints): def default_output_name(eblif):
m = re_match("(.*)\\.[^.]*$", place_constraints) return str(Path(eblif).with_suffix(".place"))
if m:
return m.groups()[0] + ".place"
return f"{place_constraints}.place"
def place_constraints_file(ctx: ModuleContext): def place_constraints_file(ctx: ModuleContext):
@ -36,22 +33,19 @@ def place_constraints_file(ctx: ModuleContext):
return ctx.takes.place_constraints, False return ctx.takes.place_constraints, False
if ctx.takes.io_place: if ctx.takes.io_place:
return ctx.takes.io_place, False return ctx.takes.io_place, False
return f"{Path(ctx.takes.eblif).stem}.place", True return str(Path(ctx.takes.eblif).with_suffix(".place"))
class PlaceModule(Module): class PlaceModule(Module):
def map_io(self, ctx: ModuleContext): def map_io(self, ctx: ModuleContext):
p, _ = place_constraints_file(ctx) return {"place": default_output_name(ctx.takes.eblif)}
return {"place": default_output_name(p)}
def execute(self, ctx: ModuleContext): def execute(self, ctx: ModuleContext):
place_constraints, dummy = place_constraints_file(ctx) place_constraints = ctx.takes.place_constraints
place_constraints = Path(place_constraints).resolve()
if dummy:
with place_constraints.open("wb") as wfptr:
wfptr.write(b"")
build_dir = Path(ctx.takes.eblif).parent build_dir = ctx.takes.build_dir
vpr_options = ["--fix_clusters", place_constraints] if place_constraints else []
yield "Running VPR..." yield "Running VPR..."
common_vpr( common_vpr(
@ -74,7 +68,7 @@ class PlaceModule(Module):
# modules may produce some temporary files with names that differ from # modules may produce some temporary files with names that differ from
# the ones in flow configuration. # the ones in flow configuration.
if ctx.is_output_explicit("place"): if ctx.is_output_explicit("place"):
Path(default_output_name(str(place_constraints))).rename(ctx.outputs.place) Path(default_output_name(ctx.takes.eblif)).rename(ctx.outputs.place)
yield "Saving log..." yield "Saving log..."
save_vpr_log("place.log", build_dir=build_dir) save_vpr_log("place.log", build_dir=build_dir)
@ -82,7 +76,7 @@ class PlaceModule(Module):
def __init__(self, _): def __init__(self, _):
self.name = "place" self.name = "place"
self.no_of_phases = 2 self.no_of_phases = 2
self.takes = ["eblif", "sdc?", "place_constraints?", "io_place?"] self.takes = ["build_dir", "eblif", "sdc?", "place_constraints?", "io_place?"]
self.produces = ["place"] self.produces = ["place"]
self.values = ["device", "vpr_options?"] + vpr_specific_values() self.values = ["device", "vpr_options?"] + vpr_specific_values()