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Supported Architectures</a>
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Modules</a>
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Understanding the (deprecated) flow</a>
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<span class="md-nav__link caption"><span class="caption-text">Design Flows</span></span>
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Introduction</a>
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Synthesis</a>
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Place & Route</a>
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Bitstream translation</a>
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<a href="flows/f4pga.html" class="md-nav__link">
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In F4PGA</a>
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<span class="md-nav__link caption"><span class="caption-text">Specifications</span></span>
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<a href="https://fasm.readthedocs.io/en/latest/" class="md-nav__link">
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FPGA Assembly (FASM) ➚</a>
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FPGA Interchange schema ➚</a>
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Glossary</a>
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References</a>
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<section id="glossary">
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<span id="id1"></span><h1 id="glossary--page-root">Glossary<a class="headerlink" href="#glossary--page-root" title="Link to this heading">¶</a></h1>
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<div class="admonition warning">
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<p class="admonition-title">Warning</p>
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<p>This is work-in-progress, since the utilities and wrappers developed in F4PGA are being redesigned (from shell to Python).
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Therefore, the terms and definitions shown below are subject to change.
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It is strongly suggested not to rely on the content below until this note is updated/removed.</p>
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</div>
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<dl class="glossary">
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<dt id="term-Artifact">Artifact<a class="headerlink" href="#term-Artifact" title="Link to this term">¶</a></dt><dd><p>An <em>artifact</em> is a result produced by a <a class="reference internal" href="#term-Step"><span class="xref std std-term">step</span></a> when executed.
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Typically, <em>artifacts</em> are files and logs generated by the <a class="reference internal" href="#term-Tool"><span class="xref std std-term">tools</span></a>.
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However, within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a> <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flows</span></a>, (meta)data can be passed across <em>steps</em> without saving
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it to disk.</p>
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</dd>
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<dt id="term-Cache">Cache<a class="headerlink" href="#term-Cache" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, the content of <a class="reference internal" href="#term-Dependency"><span class="xref std std-term">dependencies</span></a> and <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a> can
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be tracked to optimize consecutive executions of the same <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a>.
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The <em>cache</em> contains the <a class="extlink-wikipedia reference external" href="https://en.wikipedia.org/wiki/Hash_function">hash ➚</a> of the assets.</p>
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</dd>
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<dt id="term-CLI">CLI<a class="headerlink" href="#term-CLI" title="Link to this term">¶</a></dt><dd><p>A <a class="extlink-wikipedia reference external" href="https://en.wikipedia.org/wiki/Command-line_interface">Command-Line Interface (CLI) ➚</a> is an application that processes commands to
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a computer program in the form of lines of text, typically interactively (through a terminal) or in batch mode
|
||
(through scripts).
|
||
Most of the applications used in F4PGA are meant to be used through CLIs.
|
||
Precisely, <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a> <a class="reference internal" href="#term-Tool"><span class="xref std std-term">tools</span></a> provide Python abstractions around the CLIs.</p>
|
||
</dd>
|
||
<dt id="term-Configuration">Configuration<a class="headerlink" href="#term-Configuration" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, a <em>project configuration</em> is the set of parameters needed for executing a
|
||
<a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a> on a given <a class="reference internal" href="#term-Design"><span class="xref std std-term">design</span></a>.
|
||
The <em>configuration</em> might be provided through a Python API, or through a file using declarative format (such as JSON,
|
||
YAML, INI,…).</p>
|
||
</dd>
|
||
<dt id="term-Constraints">Constraints<a class="headerlink" href="#term-Constraints" title="Link to this term">¶</a></dt><dd><p>Set of parameters that allow users to select/specify certain physical characteristics of the FPGA device, such as
|
||
the pins/pads or the logic standard to use.</p>
|
||
</dd>
|
||
<dt id="term-Definition">Definition<a class="headerlink" href="#term-Definition" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, a <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a> <em>definition</em> is the description of which <a class="reference internal" href="#term-Step"><span class="xref std std-term">steps</span></a>
|
||
are to be executed and which <a class="reference internal" href="#term-Dependency"><span class="xref std std-term">dependencies</span></a> and <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a> are to be passed
|
||
along.</p>
|
||
</dd>
|
||
<dt id="term-Dependency">Dependency<a class="headerlink" href="#term-Dependency" title="Link to this term">¶</a></dt><dd><p>A <em>dependency</em> is a prerequisite to execute a <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a> <a class="reference internal" href="#term-Step"><span class="xref std std-term">step</span></a> in a <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a>.
|
||
<em>Dependencies</em> might be files (such as HDL sources, constraints, etc.), <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a> from previous
|
||
<em>steps</em> or <a class="reference internal" href="#term-Tool"><span class="xref std std-term">tools</span></a>.</p>
|
||
</dd>
|
||
<dt id="term-Design">Design<a class="headerlink" href="#term-Design" title="Link to this term">¶</a></dt><dd><p>Required <a class="reference internal" href="#term-HDL"><span class="xref std std-term">HDL</span></a> sources, constraints and other assets to execute a <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a> and achieve a task.</p>
|
||
</dd>
|
||
<dt id="term-F4PGA">F4PGA<a class="headerlink" href="#term-F4PGA" title="Link to this term">¶</a></dt><dd><ul class="simple">
|
||
<li><p><em>Uppercase</em>:</p>
|
||
<ul>
|
||
<li><p>FOSS Flows For FPGA (F4PGA), the name of the project as a whole.</p></li>
|
||
<li><p>A Workgroup under the CHIPS Alliance.
|
||
See <a class="reference internal" href="community.html#community"><span class="std std-ref">Community</span></a>.</p></li>
|
||
</ul>
|
||
</li>
|
||
<li><p><em>Lowercase</em>:</p>
|
||
<ul>
|
||
<li><p>Python package providing utilities.</p></li>
|
||
<li><p>The main CLI entrypoint provided by the Python package.</p></li>
|
||
</ul>
|
||
</li>
|
||
</ul>
|
||
</dd>
|
||
<dt id="term-Flow">Flow<a class="headerlink" href="#term-Flow" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, a <em>flow</em> is a <a class="extlink-wikipedia reference external" href="https://en.wikipedia.org/wiki/Directed_graph">directed graph ➚</a> of <a class="reference internal" href="#term-Step"><span class="xref std std-term">steps</span></a>, which
|
||
describes end-to-end sequences to achieve specific tasks.
|
||
A <em>flow</em> might used as a step within another <em>flow</em>.
|
||
In such cases, terms <em>subflow</em> or <em>partial flow</em> are used.</p>
|
||
<img alt="_images/flow.png" class="align-center" src="_images/flow.png"/>
|
||
</dd>
|
||
<dt id="term-HDL">HDL<a class="headerlink" href="#term-HDL" title="Link to this term">¶</a></dt><dd><p>A Hardware Description Language (HDL) is a computer language used for describing hardware designs.
|
||
HDLs in the scope of F4PGA include established (such as Verilog and <a class="reference external" href="https://IEEE-P1076.gitlab.io/">VHDL ➚</a>) or
|
||
emerging software-inspired paradigms like
|
||
<a class="reference external" href="https://chisel.eecs.berkeley.edu/">Chisel ➚</a>,
|
||
<a class="reference external" href="https://spinalhdl.github.io/SpinalDoc-RTD/">SpinalHDL ➚</a>,
|
||
<a class="reference external" href="https://m-labs.hk/gateware/migen/">Migen ➚</a>, or
|
||
<a class="extlink-gh reference external" href="https://github.com/amaranth-lang">Amaranth ➚</a>.</p>
|
||
</dd>
|
||
<dt id="term-Model">Model<a class="headerlink" href="#term-Model" title="Link to this term">¶</a></dt><dd><ul class="simple">
|
||
<li><p><em>Project model</em>: a generic description of an EDA project, independent of vendor and tools.
|
||
It reflects multiple design variants, grouping of source files into file sets or linking testbenches to
|
||
components or subsystems in a design.</p></li>
|
||
<li><p><em>Simulation model</em>: <a class="reference internal" href="#term-HDL"><span class="xref std std-term">HDL</span></a> sources interpreted as programming languages by simulators, which can
|
||
generate interpeted or executable <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a>.</p></li>
|
||
</ul>
|
||
</dd>
|
||
<dt id="term-Module">Module<a class="headerlink" href="#term-Module" title="Link to this term">¶</a></dt><dd><p><a class="reference external" href="https://docs.python.org/3/tutorial/modules.html#tut-modules" title="(in Python v3.13)"><span class="xref std std-ref">The Python Tutorial » Modules ➚</span></a> are files containing Python statements and definitions
|
||
(variables, functions, clases,…).
|
||
The file name is the module name with the suffix <code class="docutils literal notranslate"><span class="pre">.py</span></code> appended.</p>
|
||
<p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, user-defined <em>modules</em> allow extending the built-in <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flows</span></a> and
|
||
<a class="reference internal" href="#term-Step"><span class="xref std std-term">steps</span></a> to achieve custom and/or complex tasks.</p>
|
||
</dd>
|
||
<dt id="term-Project">Project<a class="headerlink" href="#term-Project" title="Link to this term">¶</a></dt><dd><p>A set of <a class="reference internal" href="#term-HDL"><span class="xref std std-term">HDL</span></a> sources, constraints and other assets used in a hardware <a class="reference internal" href="#term-Design"><span class="xref std std-term">design</span></a> or set of
|
||
designs.</p>
|
||
</dd>
|
||
<dt id="term-Resolution">Resolution<a class="headerlink" href="#term-Resolution" title="Link to this term">¶</a></dt><dd><p>Relations between <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a> <a class="reference internal" href="#term-Step"><span class="xref std std-term">steps</span></a>, <a class="reference internal" href="#term-Dependency"><span class="xref std std-term">dependencies</span></a> and <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a>
|
||
can get complex easily.
|
||
On top of computing the topological sorting, <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a> checks the existence of the assets, and supports
|
||
displaying the status.</p>
|
||
</dd>
|
||
<dt id="term-Step">Step<a class="headerlink" href="#term-Step" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, a <em>step</em> is a unit of execution, which is characterized by a set of
|
||
<a class="reference internal" href="#term-Dependency"><span class="xref std std-term">dependencies</span></a> and a set of <a class="reference internal" href="#term-Artifact"><span class="xref std std-term">artifacts</span></a>,
|
||
and it is composable in a <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flow</span></a>.
|
||
<em>Steps</em> might wrap a single or multiple <a class="reference internal" href="#term-Tool"><span class="xref std std-term">tools</span></a>.</p>
|
||
<img alt="_images/step.png" class="align-center" src="_images/step.png"/>
|
||
</dd>
|
||
<dt id="term-Target">Target<a class="headerlink" href="#term-Target" title="Link to this term">¶</a></dt><dd><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, <a class="reference internal" href="#term-Flow"><span class="xref std std-term">flows</span></a> can have multiple leaf <em>steps</em>, producing different results off some
|
||
shared previous <em>steps</em>.
|
||
The <em>target</em> of a <em>flow</em> specifies which <em>steps</em> to execute in a run.</p>
|
||
</dd>
|
||
<dt id="term-Tool">Tool<a class="headerlink" href="#term-Tool" title="Link to this term">¶</a></dt><dd><ul class="simple">
|
||
<li><p>A software application available as a CLI entrypoint, a shared library or an (interpreted) script.</p></li>
|
||
<li><p>Within <a class="reference internal" href="#term-F4PGA"><span class="xref std std-term">f4pga</span></a>, a <em>tool</em> is a Python abstraction that wraps a software application:</p></li>
|
||
</ul>
|
||
<img alt="_images/tool.png" class="align-center" src="_images/tool.png"/>
|
||
</dd>
|
||
<dt id="term-Toolchain">Toolchain<a class="headerlink" href="#term-Toolchain" title="Link to this term">¶</a></dt><dd><p><a class="extlink-wikipedia reference external" href="https://en.wikipedia.org/wiki/Toolchain">Toolchain ➚</a> is a generic term used to refer to a set of programming tools used
|
||
consecutively to perform a complex software development task.</p>
|
||
</dd>
|
||
</dl>
|
||
</section>
|
||
|
||
|
||
</article>
|
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