FOSS Flow For FPGA
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Krzysztof Boronski 1e82b22bb5 f4pga: Update f4pga/setupy.py to not install removed code
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
2022-05-06 06:46:50 -05:00
.github add tests with pytest 2022-04-26 12:16:38 +02:00
docs docs: s/sfbuild/f4pga/ 2022-04-26 12:16:37 +02:00
f4pga f4pga: Update f4pga/setupy.py to not install removed code 2022-05-06 06:46:50 -05:00
test add tests with pytest 2022-04-26 12:16:38 +02:00
third_party
.gitignore f4pga: cleanup and style 2022-04-26 12:16:38 +02:00
.gitmodules
f4pga-env add f4pga-env 2022-04-21 13:29:02 +02:00
LICENSE docs: s/http:/https:/ 2022-04-05 13:34:02 +02:00
README.md
readthedocs.yml move environment and makefile into docs 2022-04-23 15:01:27 +02:00

FOSS Flow For FPGA (F4PGA) project

This is the top-level repository for the F4PGA project, which is a Workgroup under the CHIPS Alliance. The elements of the project include (but are not limited to):

F4PGA Workgroup

The F4PGA Workgroup consists of members from different backgrounds, including FPGA vendors (Xilinx and QuickLogic), industrial users (Google, Antmicro) and academia (University of Toronto), who collaborate to build a more open source and software-driven FPGA ecosystem (IP, tools and workflows) to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.