131 lines
5.7 KiB
ReStructuredText
131 lines
5.7 KiB
ReStructuredText
Glossary
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########
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.. glossary::
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:sorted:
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HDL
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A Hardware Description Language (HDL) is a computer language used for describing hardware designs.
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HDLs in the scope of F4PGA include established (such as Verilog and `VHDL ➚ <https://IEEE-P1076.gitlab.io/>`__) or
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emerging software-inspired paradigms like
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`Chisel ➚ <https://chisel.eecs.berkeley.edu/>`_,
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`SpinalHDL ➚ <https://spinalhdl.github.io/SpinalDoc-RTD/>`_,
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`Migen ➚ <https://m-labs.hk/gateware/migen/>`_, or
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:gh:`Amaranth ➚ <amaranth-lang>`.
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Tool
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* A software application available as a CLI entrypoint, a shared library or an (interpreted) script.
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* Within :term:`f4pga <F4PGA>`, a *tool* is a Python abstraction that wraps a software application:
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.. image:: _static/images/tool.png
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:align: center
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Step
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Within :term:`f4pga <F4PGA>`, a *step* is a unit of execution, which is characterized by a set of
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:term:`dependencies <Dependency>` and a set of :term:`artifacts <Artifact>`,
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and it is composable in a :term:`flow <Flow>`.
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*Steps* might wrap a single or multiple :term:`tools <Tool>`.
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.. image:: _static/images/step.png
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:align: center
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Flow
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Within :term:`f4pga <F4PGA>`, a *flow* is a :wikipedia:`directed graph ➚ <Directed_graph>` of :term:`steps <Step>`, which
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describes end-to-end sequences to achieve specific tasks.
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A *flow* might used as a step within another *flow*.
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In such cases, terms *subflow* or *partial flow* are used.
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.. image:: _static/images/flow.png
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:align: center
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CLI
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A :wikipedia:`Command-Line Interface (CLI) ➚ <Command-line_interface>` is an application that processes commands to
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a computer program in the form of lines of text, typically interactively (through a terminal) or in batch mode
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(through scripts).
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Most of the applications used in F4PGA are meant to be used through CLIs.
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Precisely, :term:`f4pga <F4PGA>` :term:`tools <Tool>` provide Python abstractions around the CLIs.
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Module
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:ref:`The Python Tutorial » Modules ➚ <python:tut-modules>` are files containing Python statements and definitions
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(variables, functions, clases,...).
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The file name is the module name with the suffix ``.py`` appended.
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Within :term:`f4pga <F4PGA>`, user-defined *modules* allow extending the built-in :term:`flows <Flow>` and
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:term:`steps <Step>` to achieve custom and/or complex tasks.
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Dependency
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A *dependency* is a prerequisite to execute a :term:`f4pga <F4PGA>` :term:`step <Step>` in a :term:`flow <Flow>`.
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*Dependencies* might be files (such as HDL sources, constraints, etc.), :term:`artifacts <Artifact>` from previous
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*steps* or :term:`tools <Tool>`.
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Artifact
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An *artifact* is a result produced by a :term:`step <Step>` when executed.
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Typically, *artifacts* are files and logs generated by the :term:`tools <Tool>`.
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However, within :term:`f4pga <F4PGA>` :term:`flows <Flow>`, (meta)data can be passed across *steps* without saving
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it to disk.
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Target
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Within :term:`f4pga <F4PGA>`, :term:`flows <Flow>` can have multiple leaf *steps*, producing different results off some
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shared previous *steps*.
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The *target* of a *flow* specifies which *steps* to execute in a run.
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F4PGA
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* *Uppercase*:
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* FOSS Flows For FPGA (F4PGA), the name of the project as a whole.
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* A Workgroup under the CHIPS Alliance.
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See :ref:`Community`.
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* *Lowercase*:
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* Python package providing utilities.
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* The main CLI entrypoint provided by the Python package.
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Cache
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Within :term:`f4pga <F4PGA>`, the content of :term:`dependencies <Dependency>` and :term:`artifacts <Artifact>` can
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be tracked to optimize consecutive executions of the same :term:`flow <Flow>`.
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The *cache* contains the :wikipedia:`hash ➚ <Hash_function>` of the assets.
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Resolution
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Relations between :term:`f4pga <F4PGA>` :term:`steps <Step>`, :term:`dependencies <Dependency>` and :term:`artifacts <Artifact>`
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can get complex easily.
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On top of computing the topological sorting, :term:`f4pga <F4PGA>` checks the existence of the assets, and supports
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displaying the status.
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Definition
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Within :term:`f4pga <F4PGA>`, a :term:`flow <Flow>` *definition* is the description of which :term:`steps <Step>`
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are to be executed and which :term:`dependencies <Dependency>` and :term:`artifacts <Artifact>` are to be passed
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along.
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Constraints
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Set of parameters that allow users to select/specify certain physical characteristics of the FPGA device, such as
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the pins/pads or the logic standard to use.
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Project
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A set of :term:`HDL` sources, constraints and other assets used in a hardware :term:`design <Design>` or set of
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designs.
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Design
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Required :term:`HDL` sources, constraints and other assets to execute a :term:`flow <Flow>` and achieve a task.
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Configuration
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Within :term:`f4pga <F4PGA>`, a *project configuration* is the set of parameters needed for executing a
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:term:`flow <Flow>` on a given :term:`design <Design>`.
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The *configuration* might be provided through a Python API, or through a file using declarative format (such as JSON,
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YAML, INI,...).
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Model
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* *Project model*: a generic description of an EDA project, independent of vendor and tools.
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It reflects multiple design variants, grouping of source files into file sets or linking testbenches to
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components or subsystems in a design.
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* *Simulation model*: :term:`HDL <HDL>` sources interpreted as programming languages by simulators, which can
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generate interpeted or executable :term:`artifacts <Artifact>`.
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Toolchain
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:wikipedia:`Toolchain ➚ <Toolchain>` is a generic term used to refer to a set of programming tools used
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consecutively to perform a complex software development task.
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