mirror of
https://github.com/chipsalliance/f4pga.git
synced 2025-01-03 03:43:37 -05:00
805 lines
28 KiB
YAML
805 lines
28 KiB
YAML
# Copyright (C) 2022 F4PGA Authors
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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xc7a50t: &xc7
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values:
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device: xc7a50t_test
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bitstream_device: artix7
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pinmap: '${shareDir}/arch/xc7a50t_test/vpr_grid_map.csv'
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arch_def: '${shareDir}/arch/xc7a50t_test/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.lookahead.bin'
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rr_graph_real_bin: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.rr_graph.real.bin'
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vpr_place_delay: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.place_delay.bin'
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vpr_grid_layout_name: xc7a50t-test
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vpr_options: &xc7-vpr_options
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max_router_iterations: 500
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routing_failure_predictor: 'off'
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router_high_fanout_threshold: -1
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constant_net_method: route
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route_chan_width: 500
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router_heap: bucket
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clock_modeling: route
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place_delta_delay_matrix_calculation_method: dijkstra
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place_delay_model: delta
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router_lookahead: extended_map
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check_route: quick
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strict_checks: 'off'
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allow_dangling_combinational_nodes: 'on'
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disable_errors: 'check_unbuffered_edges:check_route'
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congested_routing_iteration_threshold: '0.8'
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incremental_reroute_delay_ripup: 'off'
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base_cost_type: delay_normalized_length_bounded
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bb_factor: 10
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acc_fac: '0.7'
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astar_fac: '1.8'
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initial_pres_fac: '2.828'
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pres_fac_mult: '1.2'
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check_rr_graph: 'off'
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suppress_warnings: >-
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${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment:calculate_average_switch
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stages:
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mk_build_dir:
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module: 'mkdirs'
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params:
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build_dir: 'build/${device}'
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synth:
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module: 'yosys'
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params:
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takes:
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- xdc?
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produces:
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- sdc
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- synth_v
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prod_meta:
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sdc: Standard Design Constraints file for X7 series.
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values:
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tcl_scripts: '${shareDir}/scripts/xc7'
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yosys_tcl_env:
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USE_ROI: 'FALSE'
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TOP: '${top}'
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OUT_JSON: '${:json}'
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OUT_SDC: '${:sdc}'
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PART_JSON: '${prjxray_db}/${bitstream_device}/${part_name}/part.json'
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OUT_FASM_EXTRA: '${:fasm_extra}'
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TECHMAP_PATH: '${shareDir}/techmaps/xc7_vpr/techmap'
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OUT_SYNTH_V: '${:synth_v}'
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SYNTH_JSON: '${:synth_json}'
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OUT_EBLIF: '${:eblif}'
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PYTHON3: '${python3}'
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UTILS_PATH: '${shareDir}/scripts'
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INPUT_XDC_FILES: '${:xdc}'
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pack:
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module: 'pack'
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ioplace:
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module: 'generic_script_wrapper'
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params:
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stage_name: ioplace
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.xc7.create_ioplace']
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outputs:
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io_place:
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mode: stdout
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target: '${:net[noext]}.ioplace'
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inputs:
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blif: '${:eblif}'
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map: '${shareDir}/arch/${device}/${part_name}/pinmap.csv'
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net: '${:net}'
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pcf: '${:pcf?}'
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$PYTHONPATH: '${binDir}/python/'
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place_constraints:
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module: 'generic_script_wrapper'
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params:
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stage_name: place_constraints
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.xc7.create_place_constraints']
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outputs:
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place_constraints:
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mode: stdout
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target: '${:net[noext]}.preplace'
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inputs:
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net: '${:net}'
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arch: '${shareDir}/arch/${device}/arch.timing.xml'
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blif: '${:eblif}'
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input: '${:io_place}'
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db_root: '${prjxray_db}'
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part: '${part_name}'
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vpr_grid_map: '${shareDir}/arch/${device}/vpr_grid_map.csv'
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$PYTHONPATH: '${binDir}/python/'
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place:
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module: 'place'
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route:
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module: 'route'
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fasm:
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module: 'fasm'
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bitstream:
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module: 'generic_script_wrapper'
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params:
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stage_name: bitstream
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script: xcfasm
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outputs:
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bitstream:
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mode: file
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file: '${:fasm[noext]}.bit'
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target: '${:fasm[noext]}.bit'
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inputs:
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db-root: '${prjxray_db}/${bitstream_device}'
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part: '${part_name}'
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part_file: '${prjxray_db}/${bitstream_device}/${part_name}/part.yaml'
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sparse: true
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emit_pudc_b_pullup: true
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fn_in: '${:fasm}'
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frm2bit: xc7frames2bit
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bit_out: '${:fasm[noext]}.bit'
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xc7a100t:
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<<: *xc7
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values:
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device: xc7a100t_test
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bitstream_device: artix7
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pinmap: '${shareDir}/arch/xc7a100t_test/vpr_grid_map.csv'
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arch_def: '${shareDir}/arch/xc7a100t_test/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.lookahead.bin'
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rr_graph_real_bin: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.rr_graph.real.bin'
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vpr_place_delay: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.place_delay.bin'
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vpr_grid_layout_name: xc7a100t-test
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vpr_options: *xc7-vpr_options
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xc7a200t:
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<<: *xc7
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values:
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device: xc7a200t_test
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bitstream_device: artix7
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pinmap: '${shareDir}/arch/xc7a200t_test/vpr_grid_map.csv'
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arch_def: '${shareDir}/arch/xc7a200t_test/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.lookahead.bin'
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rr_graph_real_bin: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.rr_graph.real.bin'
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vpr_place_delay: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.place_delay.bin'
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vpr_grid_layout_name: xc7a200t-test
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vpr_options: *xc7-vpr_options
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ice40:
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values:
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device: ICE40UP5K
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nextpnr_options:
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hx1k: true
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stages:
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mk_build_dir:
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module: 'mkdirs'
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params:
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build_dir: build/${device}
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synth:
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module: 'yosys'
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params:
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takes:
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produces:
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prod_meta:
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values:
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yosys_tcl_env:
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OUT_JSON: '${:json}'
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pnr:
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module: 'nextpnr_ice40'
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values:
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placer: heap
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router: router1
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bitstream:
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module: 'generic_script_wrapper'
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params:
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stage_name: bitstream
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script: icepack
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outputs:
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bitstream:
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mode: file
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file: "${:ice_asm[noext]}.bit"
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target: "${:ice_asm[noext]}.bit"
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inputs:
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"#1": "${:ice_asm}"
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"#2": "${:ice_asm[noext]}.bit"
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ql-eos-s3:
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values:
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device: ql-eos-s3
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device_alt: ql-eos-s3_wlcsp
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pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
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rr_graph_real_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin'
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vpr_place_delay: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin'
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vpr_grid_layout_name: ql-eos-s3
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vpr_options:
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max_router_iterations: 500
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routing_failure_predictor: 'off'
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router_high_fanout_threshold: -1
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constant_net_method: route
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route_chan_width: 100
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clock_modeling: route
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place_delay_model: delta_override
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router_lookahead: extended_map
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check_route: quick
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strict_checks: 'off'
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allow_dangling_combinational_nodes: 'on'
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disable_errors: 'check_unbuffered_edges:check_route'
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congested_routing_iteration_threshold: '0.8'
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incremental_reroute_delay_ripup: 'off'
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base_cost_type: delay_normalized_length_bounded
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bb_factor: '10'
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initial_pres_fac: '4.0'
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check_rr_graph: 'off'
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pack_high_fanout_threshold: 'PB-lOGIC:18'
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suppress_warnings: >-
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${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
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stages:
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mk_build_dir:
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module: 'mkdirs'
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params:
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build_dir: 'build/${device}'
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synth:
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module: 'yosys'
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params:
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takes:
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- pcf?
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produces:
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- synth_v
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values:
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tcl_scripts: '${shareDir}/scripts/pp3'
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read_verilog_args: []
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yosys_tcl_env:
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OUT_JSON: '${:json}'
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SYNTH_JSON: '${:synth_json}'
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OUT_SYNTH_V: '${:synth_v}'
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OUT_EBLIF: '${:eblif}'
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OUT_FASM_EXTRA: '${:fasm_extra}'
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TECHMAP_PATH: '${shareDir}/techmaps/pp3'
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DEVICE_CELLS_SIM: '${shareDir}/arch/ql-eos-s3_wlcsp/cells/ram_sim.v'
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DEVICE_CELLS_MAP: '${shareDir}/arch/ql-eos-s3_wlcsp/cells/ram_map.v'
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PINMAP_FILE: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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PCF_FILE: '${:pcf}'
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PYTHON3: '${python3}'
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UTILS_PATH: '${shareDir}/scripts'
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prepare_sdc:
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module: 'generic_script_wrapper'
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params:
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stage_name: prepare_sdc
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.process_sdc_constraints']
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outputs:
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sdc:
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mode: file
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file: '${:eblif[noext]}.sdc'
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target: '${:eblif[noext]}.sdc'
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inputs:
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eblif: '${:eblif}'
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sdc-in: '${:sdc-in}'
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sdc-out: '${:eblif[noext]}.sdc'
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pcf: '${:pcf}'
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pin-map: ''
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$PYTHONPATH: '${shareDir}/scripts/'
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pack:
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module: 'pack'
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values:
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device: ql-eos-s3
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device_alt: ql-eos-s3_wlcsp
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pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
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rr_graph_real_bin: >-
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${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
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vpr_place_delay: >-
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${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
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vpr_grid_layout_name: ql-eos-s3
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vpr_options:
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write_block_usage: block_usage.json
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max_router_iterations: 500
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routing_failure_predictor: 'off'
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router_high_fanout_threshold: -1
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constant_net_method: route
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route_chan_width: 100
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clock_modeling: route
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place_delay_model: delta_override
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router_lookahead: extended_map
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check_route: quick
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strict_checks: 'off'
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allow_dangling_combinational_nodes: 'on'
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disable_errors: 'check_unbuffered_edges:check_route'
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congested_routing_iteration_threshold: '0.8'
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incremental_reroute_delay_ripup: 'off'
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base_cost_type: delay_normalized_length_bounded
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bb_factor: '10'
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initial_pres_fac: '4.0'
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check_rr_graph: 'off'
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pack_high_fanout_threshold: 'PB-lOGIC:18'
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suppress_warnings: >-
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${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
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ioplace:
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module: 'generic_script_wrapper'
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params:
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stage_name: ioplace
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.pp3.create_ioplace']
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outputs:
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io_place:
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mode: stdout
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target: '${:eblif[noext]}.ioplace'
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inputs:
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blif: '${:eblif}'
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net: '${:net}'
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pcf: '${:pcf}'
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map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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$PYTHONPATH: '${shareDir}/scripts/'
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place_constraints:
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module: 'generic_script_wrapper'
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params:
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stage_name: place_constraints
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.pp3.create_place_constraints']
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outputs:
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place_constraints:
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mode: stdout
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target: '${:eblif[noext]}_constraints.place'
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inputs:
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blif: '${:eblif}'
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map: '${shareDir}/arch/ql-eos-s3_wlcsp/clkmap_${package}.csv'
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i: '${:io_place}'
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$PYTHONPATH: '${shareDir}/scripts/'
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place:
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module: 'place'
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iomux_jlink:
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module: 'generic_script_wrapper'
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params:
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stage_name: iomux_jlink
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
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outputs:
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iomux_jlink:
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mode: stdout
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target: '${:eblif[noext]}_iomux.jlink'
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inputs:
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eblif: '${:eblif}'
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pcf: '${:pcf}'
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map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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output-format: jlink
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$PYTHONPATH: '${shareDir}/scripts/'
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iomux_openocd:
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module: 'generic_script_wrapper'
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params:
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stage_name: iomux_openocd
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
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outputs:
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iomux_openocd:
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mode: stdout
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target: '${:eblif[noext]}_iomux.openocd'
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inputs:
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eblif: '${:eblif}'
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pcf: '${:pcf}'
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map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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output-format: openocd
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$PYTHONPATH: '${shareDir}/scripts/'
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iomux_binary:
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module: 'generic_script_wrapper'
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params:
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stage_name: iomux_binary
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interpreter: '${python3}'
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script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
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outputs:
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iomux_binary:
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mode: stdout
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target: '${:eblif[noext]}_iomux.bin'
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inputs:
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eblif: '${:eblif}'
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pcf: '${:pcf}'
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map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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output-format: binary
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$PYTHONPATH: '${shareDir}/scripts/'
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route:
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module: 'route'
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values:
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device: ql-eos-s3
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device_alt: ql-eos-s3_wlcsp
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pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
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arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
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rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
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rr_graph_real_bin: >-
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|
${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
|
|
vpr_place_delay: >-
|
|
${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
|
|
vpr_grid_layout_name: ql-eos-s3
|
|
vpr_options:
|
|
write_timing_summary: timing_summary.json
|
|
max_router_iterations: 500
|
|
routing_failure_predictor: 'off'
|
|
router_high_fanout_threshold: -1
|
|
constant_net_method: route
|
|
route_chan_width: 100
|
|
clock_modeling: route
|
|
place_delay_model: delta_override
|
|
router_lookahead: extended_map
|
|
check_route: quick
|
|
strict_checks: 'off'
|
|
allow_dangling_combinational_nodes: 'on'
|
|
disable_errors: 'check_unbuffered_edges:check_route'
|
|
congested_routing_iteration_threshold: '0.8'
|
|
incremental_reroute_delay_ripup: 'off'
|
|
base_cost_type: delay_normalized_length_bounded
|
|
bb_factor: '10'
|
|
initial_pres_fac: '4.0'
|
|
check_rr_graph: 'off'
|
|
pack_high_fanout_threshold: 'PB-lOGIC:18'
|
|
suppress_warnings: >-
|
|
${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
|
|
analysis:
|
|
module: 'analysis'
|
|
values:
|
|
device: ql-eos-s3
|
|
device_alt: ql-eos-s3_wlcsp
|
|
pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
|
|
arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
|
|
rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
|
|
rr_graph_real_bin: >-
|
|
${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
|
|
vpr_place_delay: >-
|
|
${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
|
|
vpr_grid_layout_name: ql-eos-s3
|
|
vpr_options:
|
|
gen_post_synthesis_netlist: 'on'
|
|
gen_post_implementation_merged_netlist: 'on'
|
|
post_synth_netlist_unconn_inputs: nets
|
|
post_synth_netlist_unconn_outputs: nets
|
|
verify_file_digests: 'off'
|
|
max_router_iterations: 500
|
|
routing_failure_predictor: 'off'
|
|
router_high_fanout_threshold: -1
|
|
constant_net_method: route
|
|
route_chan_width: 100
|
|
clock_modeling: route
|
|
place_delay_model: delta_override
|
|
router_lookahead: extended_map
|
|
check_route: quick
|
|
strict_checks: 'off'
|
|
allow_dangling_combinational_nodes: 'on'
|
|
disable_errors: 'check_unbuffered_edges:check_route'
|
|
congested_routing_iteration_threshold: '0.8'
|
|
incremental_reroute_delay_ripup: 'off'
|
|
base_cost_type: delay_normalized_length_bounded
|
|
bb_factor: '10'
|
|
initial_pres_fac: '4.0'
|
|
check_rr_graph: 'off'
|
|
pack_high_fanout_threshold: 'PB-lOGIC:18'
|
|
suppress_warnings: >-
|
|
${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
|
|
fasm:
|
|
module: 'fasm'
|
|
bitstream:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream
|
|
script: qlfasm
|
|
outputs:
|
|
bitstream:
|
|
mode: file
|
|
file: '${:eblif[noext]}.bit'
|
|
target: '${:eblif[noext]}.bit'
|
|
bitstream_log:
|
|
mode: stdout
|
|
target: '${:eblif[noext]}.bit.log'
|
|
inputs:
|
|
'#1': '${:fasm}'
|
|
'#2': '${:eblif[noext]}.bit'
|
|
dev-type: ql-eos-s3
|
|
values:
|
|
build_dir: .
|
|
bitstream_bitheader:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream_bitheader
|
|
script: symbiflow_write_bitheader
|
|
outputs:
|
|
bitstream_bitheader:
|
|
mode: file
|
|
file: '${:bitstream}.h'
|
|
target: '${:bitstream}.h'
|
|
bitstream_bitheader_log:
|
|
mode: stdout
|
|
target: '${:bitstream}.h.log'
|
|
inputs:
|
|
'#1': '${:bitstream}'
|
|
'#2': '${:bitstream}.h'
|
|
'#3': '${:iomux_binary}'
|
|
bitstream_jlink:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream_jlink
|
|
script: symbiflow_write_jlink
|
|
outputs:
|
|
bitstream_jlink:
|
|
mode: file
|
|
file: '${:bitstream}.jlink'
|
|
target: '${:bitstream}.jlink'
|
|
bitstream_jlink_log:
|
|
mode: stdout
|
|
target: '${:bitstream}.jlink.log'
|
|
inputs:
|
|
'#1': '${:bitstream}'
|
|
'#2': '${:bitstream}.jlink'
|
|
'#3': '${:iomux_jlink}'
|
|
bitstream_openocd:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream_openocd
|
|
script: symbiflow_write_openocd
|
|
outputs:
|
|
bitstream_openocd:
|
|
mode: file
|
|
file: '${:bitstream}.openocd'
|
|
target: '${:bitstream}.openocd'
|
|
bitstream_openocd_log:
|
|
mode: stdout
|
|
target: '${:bitstream}.openocd.log'
|
|
inputs:
|
|
'#1': '${:bitstream}'
|
|
'#2': '${:bitstream}.openocd'
|
|
'#3': '${:iomux_openocd}'
|
|
bitstream_binary:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream_binary
|
|
script: symbiflow_write_binary
|
|
outputs:
|
|
bitstream_binary:
|
|
mode: file
|
|
file: '${:bitstream}.bin'
|
|
target: '${:bitstream}.bin'
|
|
bitstream_binary_log:
|
|
mode: stdout
|
|
target: '${:bitstream}.bin.log'
|
|
inputs:
|
|
'#1': '${:bitstream}'
|
|
'#2': '${:bitstream}.bin'
|
|
'#3': '${:iomux_binary}'
|
|
fasm2bels:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: fasm2bels
|
|
script: symbiflow_fasm2bels
|
|
outputs:
|
|
fasm2bels_verilog:
|
|
mode: file
|
|
file: '${:bitstream}.v'
|
|
target: '${:bitstream}.v'
|
|
fasm2bels_pcf:
|
|
mode: file
|
|
file: '${:bitstream}.pcf'
|
|
target: '${:bitstream}.pcf'
|
|
fasm2bels_qcf:
|
|
mode: file
|
|
file: '${:bitstream}.qcf'
|
|
target: '${:bitstream}.qcf'
|
|
fasm2bels_log:
|
|
mode: stdout
|
|
target: '${:bitstream}.log'
|
|
inputs:
|
|
device: '${device}'
|
|
part: '${package}'
|
|
pcf: '${:pcf}'
|
|
bit: '${:bitstream}'
|
|
out-verilog: '${:bitstream}.v'
|
|
out-pcf: '${:bitstream}.pcf'
|
|
out-qcf: '${:bitstream}.qcf'
|
|
$F4PGA_INSTALL_DIR: '${shareDir}/../../../'
|
|
$FPGA_FAM: eos-s3
|
|
$PATH: '${shareDir}/../../conda/envs/eos-s3/bin/:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin'
|
|
$BIN_DIR_PATH: '${binDir}'
|
|
|
|
|
|
ql-k4n8_fast: &ql-k4n8
|
|
|
|
values:
|
|
device: qlf_k4n8_umc22
|
|
rr_graph_lookahead_bin: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/rr_graph_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.lookahead.bin
|
|
rr_graph_real_bin: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/qlf_k4n8-qlf_k4n8_umc22_fast.rr_graph.bin
|
|
vpr_place_delay: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/rr_graph_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.place_delay.bin
|
|
vpr_grid_layout_name: qlf_k4n8-qlf_k4n8_umc22_fast
|
|
arch_def: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/arch_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.xml
|
|
vpr_options: &ql-k4n8-vpr_options
|
|
max_router_iterations: 500
|
|
routing_failure_predictor: 'off'
|
|
router_high_fanout_threshold: -1
|
|
constant_net_method: route
|
|
route_chan_width: 100
|
|
clock_modeling: ideal
|
|
place_delta_delay_matrix_calculation_method: dijkstra
|
|
place_delay_model: delta_override
|
|
router_lookahead: extended_map
|
|
allow_dangling_combinational_nodes: 'on'
|
|
absorb_buffer_luts: 'off'
|
|
|
|
stages: &ql-k4n8-stages
|
|
mk_build_dir:
|
|
module: 'mkdirs'
|
|
params:
|
|
build_dir: 'build/${device}'
|
|
synth:
|
|
module: 'yosys'
|
|
params:
|
|
produces:
|
|
- synth_v
|
|
values:
|
|
tcl_scripts: '${shareDir}/scripts/qlf_k4n8'
|
|
read_verilog_args: []
|
|
yosys_tcl_env:
|
|
TOP: '${top}'
|
|
OUT_JSON: '${:json}'
|
|
SYNTH_JSON: '${:synth_json}'
|
|
TECHMAP_PATH: '${shareDir}/techmaps/qlf_k4n8'
|
|
OUT_SYNTH_V: '${:synth_v}'
|
|
OUT_EBLIF: '${:eblif}'
|
|
PYTHON3: '${python3}'
|
|
pack:
|
|
module: 'pack'
|
|
ioplace:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: ioplace
|
|
interpreter: '${python3}'
|
|
script: ['-m', 'f4pga.utils.quicklogic.qlf_k4n8.create_ioplace']
|
|
outputs:
|
|
io_place:
|
|
mode: stdout
|
|
target: '${:eblif[noext]}.ioplace'
|
|
inputs:
|
|
blif: '${:eblif}'
|
|
net: '${:net}'
|
|
pcf: '${:pcf}'
|
|
pinmap_xml: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/pinmap_qlf_k4n8_umc22.xml
|
|
csv_file: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/pinmap_qlf_k4n8_umc22.csv
|
|
$PYTHONPATH: '${binDir}/python/'
|
|
repack: &ql-k4n8-stages-repack
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: repack
|
|
interpreter: '${python3}'
|
|
script: ['-m', 'f4pga.utils.quicklogic.repacker.repack']
|
|
outputs:
|
|
eblif_repacked:
|
|
mode: file
|
|
file: '${:eblif[noext]}_repacked.eblif'
|
|
target: '${:eblif[noext]}_repacked.eblif'
|
|
place_repacked:
|
|
mode: file
|
|
file: '${:place[noext]}_repacked.place'
|
|
target: '${:place[noext]}_repacked.place'
|
|
net_repacked:
|
|
mode: file
|
|
file: '${:net[noext]}_repacked.net'
|
|
target: '${:net[noext]}_repacked.net'
|
|
repack_log:
|
|
mode: stdout
|
|
target: '${top}.repack.log'
|
|
inputs:
|
|
eblif-in: '${:eblif}'
|
|
net-in: '${:net}'
|
|
place-in: '${:place}'
|
|
eblif-out: '${:eblif[noext]}_repacked.eblif'
|
|
place-out: '${:place[noext]}_repacked.place'
|
|
net-out: '${:net[noext]}_repacked.net'
|
|
absorb_buffer_luts: 'on'
|
|
vpr-arch: '${arch_def}'
|
|
repacking-rules: '${repacking_rules}'
|
|
json-constraints: '${json_constraints?}'
|
|
pcf-constraints: '${pcf?}'
|
|
$PYTHONPATH: '${binDir}/python/'
|
|
values:
|
|
repacking_rules: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/qlf_k4n8-qlf_k4n8_umc22_fast.repacking_rules.json
|
|
place:
|
|
module: 'place'
|
|
route:
|
|
module: 'io_rename'
|
|
params:
|
|
module: 'route'
|
|
rename_takes:
|
|
eblif: eblif_repacked
|
|
place: place_repacked
|
|
net: net_repacked
|
|
fasm:
|
|
module: 'io_rename'
|
|
params:
|
|
module: 'fasm'
|
|
rename_takes:
|
|
eblif: eblif_repacked
|
|
place: place_repacked
|
|
net: net_repacked
|
|
bitstream:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: bitstream
|
|
script: qlf_fasm
|
|
outputs:
|
|
bitstream:
|
|
mode: file
|
|
file: '${:fasm[noext]}.bit'
|
|
target: '${:fasm[noext]}.bit'
|
|
inputs:
|
|
'#1': '${:fasm}'
|
|
'#2': '${:fasm[noext]}.bit'
|
|
db-root: '${shareDir}/fasm_database/qlf_k4n8'
|
|
format: 4byte
|
|
assemble: true
|
|
|
|
|
|
ql-k4n8_slow:
|
|
|
|
<<: *ql-k4n8
|
|
|
|
values:
|
|
device: qlf_k4n8_umc22
|
|
rr_graph_lookahead_bin: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/rr_graph_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.lookahead.bin
|
|
rr_graph_real_bin: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/qlf_k4n8-qlf_k4n8_umc22_slow.rr_graph.bin
|
|
vpr_place_delay: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/rr_graph_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.place_delay.bin
|
|
vpr_grid_layout_name: qlf_k4n8-qlf_k4n8_umc22_slow
|
|
arch_def: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/arch_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.xml
|
|
vpr_options: *ql-k4n8-vpr_options
|
|
|
|
stages:
|
|
<<: *ql-k4n8-stages
|
|
ioplace:
|
|
module: 'generic_script_wrapper'
|
|
params:
|
|
stage_name: ioplace
|
|
interpreter: '${python3}'
|
|
script: ['-m', 'f4pga.utils.quicklogic.qlf_k4n8.create_ioplace']
|
|
outputs:
|
|
io_place:
|
|
mode: stdout
|
|
target: '${:eblif[noext]}.ioplace'
|
|
inputs:
|
|
blif: '${:eblif}'
|
|
net: '${:net}'
|
|
pcf: '${:pcf}'
|
|
pinmap_xml: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/pinmap_qlf_k4n8_umc22.xml
|
|
csv_file: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/pinmap_qlf_k4n8_umc22.csv
|
|
$PYTHONPATH: '${binDir}/python/'
|
|
repack:
|
|
<<: *ql-k4n8-stages-repack
|
|
values:
|
|
repacking_rules: >-
|
|
${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/qlf_k4n8-qlf_k4n8_umc22_slow.repacking_rules.json
|