f4pga/requirements.txt
Robert Winkler 24662e78b3 Add Symbolator for generating symbols of verilog models
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2019-10-21 13:35:45 +00:00

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Sphinx==2.0.0
git+http://github.com/SymbiFlow/sphinx_materialdesign_theme.git@master#egg=sphinx_symbiflow_theme
sphinx-markdown-tables
breathe==4.13.1
symbolator==1.0.2