frontend/crossbar: fix sign on adr_shift
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@ -45,9 +45,9 @@ class LiteDRAMCrossbar(Module):
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# data width convertion
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if dw != self.dw:
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if dw > self.dw:
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adr_shift = log2_int(dw//self.dw)
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adr_shift = -log2_int(dw//self.dw)
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else:
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adr_shift = -log2_int(self.dw//dw)
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adr_shift = log2_int(self.dw//dw)
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new_port = LiteDRAMPort(mode, port.aw + adr_shift, dw, cd=cd)
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self.submodules += ClockDomainsRenamer(cd)(LiteDRAMPortConverter(new_port, port))
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port = new_port
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